[hpsdr] Lionheart to Atlas bus signals...

Leon Heller leon.heller at bulldoghome.com
Sun Mar 19 12:48:48 PST 2006


----- Original Message ----- 
From: "Philip Covington" <p.covington at gmail.com>
To: "High Performance Software Defined Radio Discussion List" 
<hpsdr at hpsdr.org>
Sent: Sunday, March 19, 2006 8:21 PM
Subject: [hpsdr] Lionheart to Atlas bus signals...


> ***** High Performance Software Defined Radio Discussion List *****
>
> Hi group,
>
> I am somewhat concerned that we are getting too specific in the
> definition of certain signals from the Lionheart to the Atlas bus.
> Would it not be a better idea to keep that definition more generic? -
> we have a FPGA so the actual function of those signals can be pretty
> much redefined at any time.
>
> I think as long as we bring the XBUS and YBUS lines to the FPGA we
> will be in good shape.  Let's not define certain I/O lines out of the
> Lionheart as I2S, I2C, SPI, etc... quite yet.
>
> I think we the I2C and SPI buses should come from the FPGA also and
> not the FX2 as far as the Atlas is concerned.  The FX2 can have it's
> own private I2C bus (maybe also brought out to a header) to talk to
> its serial EEPROM (PLEASE add this as Eric B. suggested - we need our
> own VID/PID/DID).  [We can have the FX2 optionally start from this
> EEPROM instead of having to upload the firmware over the USB.]  By
> having the FPGA do the I2C and SPI we can defer the definition of
> which actual lines on the Altas bus until later.
>
> I am in complete agreement with Eric B. that all possible pins of the
> FX2 should be connected to the FPGA even if this means going to the
> next device up to get the I/O count we need.  If you think of the FPGA
> as a kind of wirewrap breadboard you will also see the importance of
> this.  Adding some headers on the Lionheart to bring out extra I/O
> from the FPGA is also a good idea for future expansion.

When I created the FPGA part, I defined all the I/Os as swappable pins, so 
the PCB layout can be easily optimised without a lot of messing about.

There might be a problem with I2C on the FPGA, has anyone actually 
implemented it? SPI is quite easy, on the other hand.

Leon 

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