[hpsdr] [OZY] Initial OZY Schematic Posted For Review and Comments - May 10, 2006

Philip Covington p.covington at gmail.com
Wed May 10 12:54:30 PDT 2006


Hi group,

In SVN and here:

<http://www.hamsdr.com/personaldirectory.aspx?id=231>

I have posted the initial schematic for the OZY board design.  It is
in PDF format.

Please review and make comments.

Some initial questions:

1.  Do we need external SRAM?  There are 26 RAM blocks of 4608 bits
(including parity) each in the Cyclone II EP2C5Q208C8 part that I am
using.  I can probably fit in a 128Kx8 (1Mb) SRAM but, if populated,
it will use up the 32 expansion IO lines that are left from the FPGA.

2. Are 8 optional SMT LEDs tied to the FPGA_GPIO[1-8] lines enough for
status/debugging use?  These would not be of much use if I add the
SRAM to those lines, so that is why I call them optional.

73 de Phil N8VB



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