[hpsdr] [OZY] Schematic Update May 17, 2006

[Philip Covington]

Hi group,

REVXA.4 schematics in PDF format are available at:

<http://www.philcovington.com/HPSDR/OZY/REVXA.4/> as well as HPSDR SVN.

There is also a PDF of the top component placement as well as PDF of
the preliminary top and bottom layers.  The board is 4 layers.

Here are some of the changes from REVXA.3 to REVXA.4:

1. Added back the 20 pin logic analyzer/debug port.

2. Worked out the OE enable scheme on the local IO buffers.

3. Changed all solder jumpers to zero ohm 0603 jumpers.

4. Added 100k terminations to ground on all lines leaving the board
from the FPGA.

5. Added optional ULN2003A open collector output (4 lines).

6. Changed some of the Panasonic resistor networks to larger sizes for
ease of soldering.

7. Added option to allow selection of FX2_T1,T2,INT5 to be routed to
the FPGA via configuration jumpers.

8. Added 2 pin header for external reset.

9. Misc other changes...

Comments/suggestions appreciated.

73 de Phil N8VB