[hpsdr] [OZY] Initial OZY Schematic Posted For Review and Comments - May 10, 2006

[Ahti Aintila]

Phil,
Try 1N4148, it has Cj = 4 pF with 0V bias. Put at least one to ground
for clamping the negative peaks. Another may go to a positive voltage
higher than +5V.

Ahti

On 11/05/06, Philip Covington <p.covington at gmail.com> wrote:
> On 5/10/06, Ahti Aintila <oh2rz.sdr at gmail.com> wrote:
> > Phil,
> >
> > The small inductor L1 from P1/pin4 to ground is useful for limiting
> > the ground loop currents, but C13 should be connected to P1/pin1
> > (+5V). C14 is unnecessary. Data lines from P1/pin2, pin3 to DMINUS and
> > DPLUS should have a small common mode choke and overvoltage clamps
> > like SN75240PW. Keep the PCB trace capacitance of the data lines small
> > and well balanced.
>
> Any recommendation on a particular overvoltage clamp?  The SN75240PW's
> input capacitance is too high for USB 2.0 according to the datasheet.
>
> 73 de Phil N8VB
>

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