[hpsdr] Operating Configurations

[Philip Covington]

On 5/12/06, Lyle Johnson <kk7p at wavecable.com> wrote:
> Hello Chris!
>
> > ...1-Wire sounds even better in principle; I
> > just can't make the available parts I know about - and I know very
> > little about them - fit the problem. For instance, my brief scan of the
> > EEPROM data sheet indicated that the "Erasable" part of that is very
> > weak; essentially these are Once Programmable devices. For developer's,
> > turning the typical cycle into Code, Compile, Load, Debug, Heat Up
> > Soldering Iron, Replace Part and Repeat, doesn't sound very appealing.
> > Nevermind expensive.
>
> DS2431P has 1 k-bit of EEPROM, can be erased/programmed 200,000 times,
> retention is 10 years minimum, and costs 61 cents in 1K qty ($1.15 in
> unit qty).  And has a 64-bit serial number unique to each device.
>
> 73,
>
> Lyle KK7P

1. It would be nice if the EEPROM parts from Dallas were easier to
get.  There aren't too many 1-Wire devices that are easy to get in
general though.

If we use the 1-Wire devices with some EEPROM, why could we not just
encode a board ID and revision number?  The FX2 goes out and reads
these IDs from the plugged in boards and returns the results to the
host computer.  The host computer looks up the board IDs in a table
and does the appropriate thing.  In case of duplicates it
differentiates the boards by the unique serial number.

Any which way I like the idea of having the 1-Wire bus available.

2. Putting an I2C EEPROM on each board places a limit on the number of
boards because of the previous mentioned 3 configurable address lines.
 Are there any serial EEPROMs that support the 10 bit extended
addressing?  I would rather not deal with sub-buses or bus switches
for getting around having multiple devices with the same address on
I2C.

3. SPI EEPROMS would not be practical since they each need a CS line
and we only have 5 defined on the bus.

If there is a EPM240 (or FPGA) on the slave boards that is standing
between the board and the ATLAS bus (like the one in JANUS), we might
be able to do a little trickery with the SPI bus by defining some
simple addressing protocol that the EPM240 decodes.  That way we could
have multiple SPI devices on a board but still use the ATLAS nCS(0:4)
chip select lines from the OZY.  By writing to a register in the
EPM240 we would select which SPI device on the board that is being
addressed/connected to the ATLAS SPI bus.  One particular address
would be reserved  for reading/writing the EPM240 user flash memory
with the board's configuration settings/ID.  Since we know that
address and we know which nCS we are asserting, then the FX2 could
read the board configs on start up as in the 1-Wire case above.

Just some ideas to throw out there...

73 de Phil N8VB

 1147463934.0