[hpsdr] What can we do with 2 cards

[Bill Tracey]

I think I can forgo external SRAM - if it turns out we need it then we're 
into rethink/redesign mode.  The fact that the USRP moves about 32 
mbyte/sec w/o external SRAM gives me confidence we can build the things 
people want to build w/o it.   Anyone concerned on closing off the option 
of external SRAM?

As to Logic Analyzer/Debug Ports -- really hate to give up on these.  Guess 
I'm wondering if we can figure out a way to make it a build time decision 
if you have logic analyzer/debug capability  or expanded GPIOs to the 
external world.  I don't have a logic analyzer and suspect the bulk of the 
users of the card won't.  However having that capability for the folks that 
do have them will probably make our life a lot easier building and 
developing stuff for the boards.

Regards,

Bill (kd5tfd)

At 06:57 AM 5/13/2006, Philip Covington wrote:
>Hi Bill,
>
>If we agree to forgo the Logic Analyzer/Debug Port(s) and also agree
>that we will never expect to add external SRAM then I can drop the I2C
>IO stuff and provide somewhere around 32 I/O off the OZY.  I think you
>can do all 3 below then.  Then we need to discuss how to
>protect/buffer those lines in a way to allow all 32 to be inputs,
>outputs, or a combination of both.
>
>I am leaving soon this morning, and on the drive to/from home I will
>be thinking more about this.
>
>73 de Phil N8VB



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