[hpsdr] Mercury: LTC2209

[Henry Vredegoor]

Hi Phil & Phil, Alberto, Jason, All,

> > Another question would be: Why did you switch from 2 ADC's (as mentioned
in
> > the Mercury calculation text) to one?
> 
> I am not aware that there were any plans to use two ADCs.

Sorry but I think no confusion here:

>From the Mercury Wiki page (IP3 and Noise figure calculations):

<Quote>

.....Normally with a single A/D the Nyquist bandwidth is half the sampling
frequency but we will be generating phase and quadrature signals so the
noise is spread across the full sampling bandwidth. (It can be thought of as
2 samples.).....

<Unquote>

If you look at the IP3 and Noise Figure calculations etc., they all use the
full bandwidth /100 MHz sample rate and not the 100 MHz/2.

This gave me the impression that initially there were somewhere 2 ADC's
planned.

???


But now that you started some nice technical discussion about what would be
required to realize all this:  ;-)
(Just for my technical curiosity)

- You seem to have managed to have a 125 MHz sample clock-circuit for the
LTC2208 and an FPGA interface layed-out and working?
- A 125 MHz sample clock-circuit and lay-out for two LTC2208's/-2209's would
be how much harder?
- A 90 degree phase shift between the two sample clock inputs would be how
difficult? 
  (If I am right that this would be the way to go to create the I and Q
signals)

Then I think (and I agree) the difficult part:

- Going from 125 MHz to 170 MHz with all the requirements for board lay-out,
clock phase jitter etc.

I probably am missing a "few" things here, as I am not at al experienced in
this field....... ;-)
Just curious.

73's,
Henry.






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