[hpsdr] Mercury: LTC2209

[Jason A. Beens]

> from Phil...
>It is not trivial to come up with a clock generation and distribution
>scheme to drive two LTC2209 ADCs.

I like the term "not trivial"... I would probably choose less polite
words to describe the effort.  

Performing a high speed digital layout with a wide parallel interface
can be really annoying.  I prefer to use serial interfaces when
possible, but at these sample rates the serial interface would have to
be very high bandwidth.  To move data at the maximum rate of the LTC2209
would require a serial link with a bit rate of more than 2.7
Gbits/second. 

The raw data throughput is within the ability of PCI Express, and
possibly some of the SerDes stuff used for gigabit Ethernet (like in
back plane operations).  There are some nifty FPGAs that incorporate
these functions as hardware, but I have not seen a PCI Express ADC, yet
to mate up with the high performance FPGA serial interface.  

There are folks on this list who seem to be in tune with what the
semiconductor manufacturers are currently producing... Is such an ADC on
anyone's radar?

I would be surprised if the answer is yes, but I am curious.

Jason Beens
KB0CDN


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