[hpsdr] Verilog vs VHDL

[k5nwa]

At 06:37 PM 8/29/2007, you wrote:
>***** High Performance Software Defined Radio Discussion List *****
>
>I'm going to take a crack at answering you in a different way.
>
>Do you know C?
>
>If so - then likely Verilog is more your cup of tea and would be far
>easier to learn than VHDL.
>
>However, if you are a fan of strongly typed languages that protect you -
>the VHDL is more likely what you'll take a liking too.  VHDL is very
>much a descendant of ADA.
>

Interesting take on the issue. Yes I feel comfortable with C but I 
prefer slightly more strongly type languages such as Pascal and 
Modula, they tend to catch a lot of dumb errors that one can make 
specially in data or function declarations and usage.

In principle VHDL sounds more like what I like in a language, strong 
typing and error checking, but there is a lot to be said for a 
language (Verilog) that is supported by quite a few fellow hams. 
Fortunately, the Xilinx development system supports both Verilog and 
VHDL  so a little testing while in the learning mode is going to be 
needed before making a final decision.

Eric Blossom mentioned a book "HDL Chip Design" by Douglas J. Smith, 
I will try to get a copy, I think the UofA has a copy and I checked 
it out some month back, if it's the same book it was really good, 
doing comparisons side by side of the languages while implementing 
some useful functions. I just checked Amazon and a used copy goes 
from $99 to $349, I better check the library.



Cecil
KD5NWA
www.softrockradio.org  www.qrpradio.com

"Blessed are the cracked, for they shall let in the light." 


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