[hpsdr] HPSDR Mercury Info
Henry Vredegoor
henry_vredegoor at hotmail.com
Sun Feb 18 13:43:50 PST 2007
Hi Phil,all,
Thank you Phil for your response!
Sorry I did want to post to the reflector instead of your personal mail
address, instead I just hit "reply".....
Wouldn't it be a nice feature in this respect to have some degree of
"scalability" by e.g. full or partial population of the boards and/or
selection of part types?
Maybe also an option for people who don't want to spend too much money first
time.
For example:
Single RX Channel --> ONE FPGA populated, option to (have-) add(ed) a
second FPGA later
Dual RX Channel or more program resources --> TWO FPGA's populated
Or to go even further:
Possibility of population of the same "basic" board for different type$ of
FPGA's?
All of course being possible/doable/practical
Sorry, just venting idea's......
Not wanting to waste your time with my remarks...... :-)
Regards,
Henry.
> -----Original Message-----
> From: Philip Covington [mailto:p.covington at gmail.com]
> Sent: zondag 18 februari 2007 20:57
> To: Henry Vredegoor
> Subject: Re: [hpsdr] HPSDR Mercury Info
>
>
> On 2/18/07, Henry Vredegoor <henry_vredegoor at hotmail.com> wrote:
> > > -----Original Message-----
> > >
> >
> > < snip >
> >
> > > The Digital Down-conversion (DDC) function will be done
> in the FPGA.
> > > Without going into the details of CIC filters and their
> compensation
> > > filters, there is enough room for most of the filtering and
> > > down-sampling functions in the FPGA except for the final step. We
> > > need a compensation filter of about 300-512 taps for both
> the I and Q
> > > data paths. Filters of this size require a larger and
> more expensive> > FPGA to have enough Logical Elements (LEs)
> or Multipliers (MACs) to
> > > implement them.
> > >
> > > Instead I have found a company that makes a serial FIR
> engine in a 3mm
> > > x 3mm QFN package:
> > >
> > < snip >
> >
> > Pity for you not going into detail about this Phil, ;-) , hence my
> > (maybe-)stupid remark as a newbie to DSP:
> >
> > Would using TWO instead of ONE FPGA's solve the problem of
> the number LE &
> > MAC elements? Or still not enough?
> > I don't know how this would work out technically or would
> add up price-wise
> > (4 X QF1D512 against 1 extra FPGA), but one of the plusses
> would be more
> > flexibility / programming resources?
> >
> > Sorry if this is a too obvious newbie remark!
> >
> > Regards,
> >
> > Henry.
>
> Hi Henry,
>
> We have actually thought about going with the EP2C20 Cyclone II
> device. In HPSDR Mercury we will also have the EP2C8 device on OZY
> that can be partially utilized. The problem is to get the 100 dB
> alias rejection we want in Mercury for HF use, we need a relatively
> high order FIR filter. These tend to take up a lot of space in the
> FPGA especially when they are operating on two streams (I and Q) of 24
> or 32 bit data. To fit everything in the EP2C20 device is pushing it
> for even one rx channel.
>
> The Quickfilter devices are about $7 in single quantity. If we make
> provisions for placing 4 devices we could leave two unpopulated for
> cost sensitive applications.
>
> The advantage of having a larger FPGA gives us versatility and the
> ability to fit the processing to different applications of the
> Mercury. We could always look at a Stratix or Stratix II FPGA but
> then we are talking about devices in the min of $250-$350 range.
>
> Now if I was building just one receiver for my own use I'd say screw
> it and put a $500 Stratix II device on-board and then do about
> anything I'd want as far as processing.
>
> 73 Phil N8VB
>
1171835030.0
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