[hpsdr] FPGA image loading (was Re: another Ozy built - write_i2cV1.1 errors)

[Ramakrishnan Muthukrishnan]

I had put my J24 in the wrong place. Fixed it and it loads firmware.
But am noticing that sometimes it takes issueing the
upload_firmwarev1.1 two times for the firmware to load correctly. Is
this expected behaviour ?

Thanks
Ramakrishnan

On 7/16/07, Ramakrishnan Muthukrishnan <vu3rdd at gmail.com> wrote:
> I just noticed this on the command prompt when I run initozy11.bat.
>
> E:\powerSDR\bin\Release>upload_FPGAV1.1 0xfffe 0x0007 Ozy_Janus.rbf
> finding busses...
> finding devices...
> usb_get_busses...
> bus location: 0
> Checking for VID PID...
> Found VID PID: fffe 7
> Trying to open device...
> Device handle is: 9377584
> TS:7/15/2007 1:33:57 PM
> TS:7/15/2007 1:33:57 PM FL_BEGIN
> 87010 bytes were transfered
> TS:7/15/2007 1:33:58 PM FL_XFER
> Failed at FL_END
> FPGA LOAD FAILED!
> Closing device...
> done...
>

-- 
  Ramakrishnan - VU3RDD