[hpsdr] Blackfin

Philip Covington p.covington at gmail.com
Fri Jul 13 03:54:54 PDT 2007


On 7/13/07, James Courtier-Dutton <James at superbug.co.uk> wrote:
> ***** High Performance Software Defined Radio Discussion List *****
>
> michael taylor wrote:
> > ***** High Performance Software Defined Radio Discussion List *****
> >
> > On 7/12/07, Philip Covington <p.covington at gmail.com> wrote:
> >> The intermediate CIC stages all get trucated  to 24 bits.  I can spit
> >> out any rate I/Q data from about 8 MSPS to <8kSPS over USB.   With PCI
> >> Express I can DMA into memory at up to 250 MBytes/sec.
> >
> > Is there an affordable way to utilize PCI-express?
> >
> > Or would SATA or SAS (Serial Attached SCSI) be viable / affordable to
> > consider as transports, from an external device to a generic (ITX or
> > ATX) computer?
> >
> > -Michael, VE3TIX
>
> One might also want to use an interface that is optical, to help isolate
> the computer from the RF input board. Once could use 1 Gig Ethernet, and
> just put the data in ethernet frames, without any UDP or TCP.
> This would give you about 975Mbits/sec data throughput.
> By using UDP, this would drop to 957Mbits/sec data throughput.
> One could use Optical GigE for the optic isolation.
> So, using UDP would give one:
> 957/8 =  119 Mbytes/sec.
> For 16bit samples, this would be: 59MSPS
> For 24bit samples, this would be: 39MSPS
> For 32bit samples, this would be: 29MSPS
>
> There might be some added overhead, because one might want to include a
> timestamp, or sequence counter in the data inside the UDP, in order for
> the receiving end to know if any packets had been lost.
> If the RF input board was using a GPS clock time source, once could time
> stamp it with GPS accurate time. One could truncate this timestamp using
> the following method.
> Let the computer do NTP to get better than +-1 second accuracy, and use
> the microsecond timestamp truncated to +-1 second accuracy from the GPS
> accurate time, then merge the two times. Some care must be taken when
> merging the two times, but it can be done.
>
> Once can also use two GigE interfaces if one needed to double the
> traffic, and just multiplex alternate UDP frames down each one, and
> re-order them in the PC by using the timestamp.
>
> Another option is external PCIe. It has an optical cable option.
>
> There are trade-offs with all options, GigE has the advantage of long
> distances and is cheap. PCIe is shorter distance, but faster.
>
> Once the bandwidth between the RF input board and the computer
> increases, one might be able to separate the FPGA from the ADC on the
> input card. So, have an external RF input board with just Direct ADC
> feeding to computer, and possibly use a hardware accelerator card, e.g.
> Cell processor, within the PC to do the digital filtering at those high
> rates. This would make the RF input board cheaper and more flexible. I
> wonder how much CPU power one would need to run dttsp at 125MSPS instead
> of the current 96SPS? This is also another reason why one might still
> need the FPGA.
>
> Kind Regards
>
> James

Check out my QS1RT project:

<http://pcovington.blogspot.com/2007/07/qs1rt-verb-pcb.html>

The VERB connects to the PCI Express (there will be a PCI version too)
interface with either copper or optical fiber through SFP transceivers
at 2.5 Gbps using TI TLK2701 SERDES chips on both ends.  One lane (1X)
PCI Express is 2.5 Gbps so it matches nicely.

I have successfully tested the system over 100 meters of fiber.   100
meters is the longest length I could borrow for testing and not the
limit.

When external PCI Express become more widely available, it will be
easy to use with the PLX PCI Express to local bus interface chip that
I am using.

73 Phil N8VB

 1184324094.0


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