[hpsdr] Ozy with Gb Ethernet

[J.D. Bakker]

>I really think that a GbE card is overkill this design. A 10/100BT 
>card might be better using an ARM7 processor and could be done 
>fairly easily, at lower cost. I'll continue my research and welcome 
>all input.

Although using a PHY directly hooked to an FPGA like the Virtex4 
devkits have it is quite versatile, a much simpler solution is to use 
an integrated MAC/PHY Ethernet chip, such as one of these:

http://www.davicom.com.tw/eng/products/dm9000.htm
http://www.smsc.com/main/catalog/lan9218.html

Add a simple microcontroller to supply an UDP Multicast header and a 
CPLD plus FIFO to DMA the sample data straight into the Ethernet 
chip's transmit buffer. A simple header board for one of these is 
available here:

http://www.olimex.com/dev/dm9000e-h.html

JDB.
[doing something similar for a 100Mbit version of http://ronja.twibright.com/ ]
-- 
LART. 250 MIPS under one Watt. Free hardware design files.
http://www.lartmaker.nl/

 1173571896.0