[hpsdr] : PWM / PDM

[Phil Harman]

Thanks for the most interesting discussions on PWM for Class E amplifiers. There seems to be a number of possibilities as to how to overcome the low voltage output problem.

1. Use a closed loop control system that compaires the output envelope with the modulating signal. This appears to be what Josef, DJ7AW, does with his single transistor 80m -15m Class E 400w PA. I have a pdf of his article, in German, that explains his complete amplifier. I can send it to someone who could perhaps put it on a download site. 

It looks like the reason he stops at 15m is not because the PA wont operate at this frequency but the fact that he can't compensate for the phase shift between the RF drive and envelope.  We have independant control of this phase relationship with Penelope so should be able to get the design to work on 12 and 10m. 

His design uses a single ARF447 which looks like a $36.00 device.  I'm not sure how well the feedback loop will perform given the delay throught the output filter.

2. As already suggested, use a linear regulator for low output voltages which switches to PWM at higher output levels. This was the path I intened to go down until seeing DJ7AW's circuit.

3. I know of a commercial Class E PA that does it another way.  They bias the FET in Class A for low level inputs and don't clip the drive signal until a specific level is reached. The fact that the drain volts do not drop below 8 v is then not a problem. In effect the PA moves from Class A to Class E with varying input signal level. 

It looks in this instance that the RF side of the project is relitively straight forward and the challenging part is the analog side.

It would be great if we could develop a  Class E PA as an HPSDR project.

73's Phil...VK6APH 




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