[hpsdr] Fixed SAW Oscillators

John Miles jmiles at pop.net
Tue Feb 26 21:11:21 PST 2008


> I'm afraid I don't think a fixed SAW oscillator is the universal
> panacea! Like
> Francis, I've had a certain amount of experience in that area, in
> my case as
> a user. Waving hands, SAW oscillators are about an order of
> magnitude better
> than good L/C oscillators in terms of phase noise and stability, but even
> phase-locked to a good 10MHz reference, the noise beyond the loop
> bandwidth
> won't be improved.

Have you taken a look at the specs on those parts?  The broadband floor of
the CVCSO-914-1000 VCSO appears to approach -170 dBc/Hz.  At 10 kHz it
is -136 dBc/Hz.  These figures are quite good, competitive with the best
signal generators available.  You would want to use a relatively-narrow PLL
to lock these units to a 10 MHz clock, no matter how clean the 10 MHz clock
is.

> The best way of making a very good 1GHz reference still seems to
> be to based
> on a very low noise VHF crystal oscillator phase-locked to a low
> frequency
> (10MHz) reference. It may be possible, to use an 'inverted-mesa'
> crystal at
> 500MHz or even 1GHz, if you can get a good crystal at a realistic
> price, but
> I think I'd still bet on a fifth overtone crystal at 125MHz.
>
> Multiplying 125MHz to 1GHz will inevitably increase the phase
> noise sidebands
> on the crystal oscillator by about 18dB. There's no way around that.

Agreed, a carefully-multiplied low-noise VHF crystal will still be quieter.
However, now you're talking about a complex and elaborate multistage system
with multiple tuned circuits.  Consider what would happen if you wanted to
use a simpler topology  to lock your 1000 MHz DDS reference to an external
10-MHz clock.  Start with a nice, clean 10-MHz source, say an HP 10811.
Subtract the 40-dB inband noise penalty, and ask yourself, what should the
loop bandwidth be, in order to take advantage of the 10811's close-in
stability and the SAW oscillator's excellent broadband floor?

The answer, if you can believe the spec sheet, works out to about 2 kHz,
where the VCSO is good for about -120 dBc/Hz and the 10811 is good for
about -160 dBc/Hz.

That's really pretty impressive for about $150 in parts.  Yes, you can do
better, but if you're just going to feed a DDS, does it matter?

> If it's designed well, a low-noise VCO based on a quarter-wave
> ceramic coaxial
> resonator could be locked to the 125MHz oscillator using a sampling phase
> detector (or a suitable harmonic mixer...). I'm still working on that. A
> phase/frequency detector isn't suitable

That depends.  Some of the off-the-shelf CMOS PFD chips are quite good these
days.

If you are doing this work to drive a DDS, then there is no point in
worrying about process noise floors in the PLL, because you'll still be
limited by the very same processes used to fab the DDS chips.

-- john, KE5FX


 1204089081.0


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