[hpsdr] Fixed Saw Oscillators

[Bob McGwier]

Alberto I2PHD wrote:
> ***** High Performance Software Defined Radio Discussion List *****
>
> Grant Hodgson wrote:
>   
>> The lowest phase noise approach would probably be as Chris GW4DGU has 
>> stated, which is to use a VHF crystal oscillator with a low noise 
>> multiplier, but in order to get very low spurs (of the clock 
>> sub-harmonics) a high degree of filtering is required, which as has 
>> already been mentioned, is not a trivial task.
>>     
>
> That way was also used by Giuliano I0CG for the 1GHz clock for his new AD9912 DDS board.
> Look here :
> http://www.sdradio.eu/doc/1_GHz_clock.pdf
>
> 73  Alberto  I2PHD
>
>   


It is good to have this discussion.  It gives us the necessary openings 
to give everyone the understanding of the difference between phase 
stability and accuracy and other factors.   Phase stability, which is 
what most of this discussion has been about,  is minimizing the sources 
of AM to PM conversion in an oscillator circuit as described so 
fantastically by Chris in his slides;  while attempting to use some kind 
of feedback mechanism to minimize phase offset from some reference 
signal.  But this is as good as the reference signal and not better.  I 
really think Chris' low noise oscillator talk/slides are about the best 
overall treatment of this from the ease of understanding, exposition, 
etc. I have ever seen.  

The other side of this is accuracy, as in frequency accuracy.  The nice 
thing about the 2nd order PLL circuits is they can help achieve accuracy 
and phase stability.  But outside of the "noise bandwidth" of the phase 
locked loop filter,  you have approximately the same noise as before but 
now it is centered on frequency!   Increasing the bandwidth of the PLL 
filter, will allow more wandering in the frequency that we desire.  So 
it is clear there is a trade off.

The trade should probably occur "at the spot" of the cross over in terms 
of crystal phase stability and locked longer term stability (which will 
translate into frequency accuracy) in the typical alan deviation plots 
of crystal oscillators and free running results from a PLL based 
oscillator. This will be a neat little analysis to do and the design 
should be interesting to achieve it.

I0CG circuit is a crystal oscillator based system that appears to have 
very good short term  phase stability characteristics.  But there is no 
provision for accuracy outside of hoping the crystal stays on frequency 
and you have paid the price for an aged crystal.

75 db SFDR (if that really is the limit) in the I0CG design is not good 
enough.  From the plots,  it appears that this measurement may have been 
instrument noise limited but we cannot tell from the information given.  
We are trying to use these higher end DDS's, which are clearly marching 
down the road towards having spurious emissions below the ambient noise 
floor of the channel in the receive system they will be in.  I am hoping 
for > 100 dB SFDR so we might out IMD DR numbers everywhere.   I would 
hate for oscillator spurs to cause modulation of the DDS output.

Great discussion!

73
Bob, N4HY

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