[hpsdr] Hpsdr Digest, Vol 25, Issue 3

Chris Bartram chris at chris-bartram.co.uk
Mon Mar 3 18:11:13 PST 2008


Hello John

> Yes, I remember having to do the 1M-resistor trick at the output of the
> 4046's PFD section, to keep it out of its "dead band."  PFDs have, however,
> come a LONG way since the 4046 was designed.  Modern parts from Analog and
> National are not subject to dead-band behavior in the least.

Oh yes they are! Maybe not at levels you'd see in normal instrumentation and 
comms. applications, but just try doing something really demanding like using 
them to recover a stable carrier from the NCO output of a GPS timing 
receiver. You then have to use a linear phase detector to get the best from 
the system. I have that particular teeshirt! Similar considerations apply to 
trying to get a narrow line-width from a single-loop microwave synthesiser. 

A haven't used a 4046 for about 25years, so I can't really comment on that now 
very elderly device! But I do have quite a lot of experience using modern 
synthesiser chips - both integer and fractional-N, mainly from National and 
Analog.

> I'll confess that I have never tried an XOR-gate phase detector.  

Linear phase detectors, like the XOR gate or DBMs still have a place...

> I've made 
> extensive measurements of sampling-loop PLLs in HP gear, though, including
> the 8753 VNA and 8566 spectrum analyzer.  The 8753 is limited to about -100
> dBc/Hz at 2.5 GHz due to noise added by its SRD multiplier driver, while
> the 8566 ends up at about the same level due to noise in the ECL M/N
> synthesizer that drives the sampler.  However, as I recall, the sampler in
> the 8566 is limited to around -112 dBc/Hz, presumably due to conversion
> loss.

> Both of those figures are easy to beat with current ADI/NS/Hittite PFD
> chips, even at much-higher N factors.

Of course. But I don't think it's right to compare the systems in use in those 
instruments with the approach I'm proposing. There are potentially new ways 
of designing harmonic samplers with better performance. 

> > In practice, the folding effects you posit don't seem to be that
> > significant,
> > presumably because in a harmonic locking system everything is
> > synchronous.
> > Also, with a decent VCO, the sampler should only be seeing a single
> > sinusoidal signal...
>
> Its input port is not noiseless, though.  Samplers are inherently wideband
> devices, and there is a lot of kTB noise in a spectrum several GHz wide,
> even with the VCO turned off.  My understanding is that the kTB noise ends
> up folded down to baseband around each LO comb tooth.

OK. Let's put my comment in a different way! Being slightly simplistic, the 
sampler can be considered as a parallel group of passive mixers, each 
converting it's own harmonic to baseband. Each output will look like the 
output of a mixer, and we know that the additive noise of diode or passive 
FET mixers is very small. So even summed, that's unlikely to be a major 
problem. Even with a perfect sampler, the only possible significant outputs 
are will come from the signal being sampled. In practice, the noise sidebands  
will be so far from the carrier, that with a well designed VCO, they should 
be insignificant. In a second case, the mixer outputs will consist of 
products at the generated by the harmonic driving the mixer and the VCO. Most 
of these will be at frequencies above the cut-off of the loop filter.

One of the problems with older samplers using technologies like SRDs to 
generate the sampling impulse and diodes as the sampling gate is that they 
are less than ideally efficient as the the impulse occupies a significant 
part of the sampled signal period. 

There's at least one new impulse generator technology (RACE - nothing to do 
with logic races - look at US Patent 6433720) which is reported to give 1ps 
pulse widths, and is amenable to integration. I'm hoping that an open market 
chip might become available. Microwave HEMTs are now cheap commodity items 
and make remarkably good, linear, fast switches. I think it's possible to 
improve very significantly on the old SRD/diode samplers, particularly in the 
low-microwave region we're discussing.

> > For the 1GHz case which we've been
> > discussing over the
> > last few days, I've looked at the use of packaged commercial DBMs as a
> > sampler. Within their frequency range they work well, as might be
> > expected,
> > on odd-order harmonics, and seem to essentially be operating as samplers
> > rather than harmonic mixers. I need to understand that better.
>
> Yes, using DBMs as samplers is a really-interesting topic in itself.  There
> are some rather-intriguing implications for homebrew VNA design if nothing
> else.

We agree there! 

> > Don't forget that a sampler will have a sensitivity which (at least in
> > theory!) is independent of harmonic number. Harmonic mixers are a
> > different
> > beast...
> > A major problem is generating a suitable pulse.
>
> I'm not sure I'm comfortable with the notion of sensitivity as being
> relevant to the residual PN floor of a sampler-based PLL, but I'd have to
> yield the point since I don't have a good argument either way.  All I know
> is that sampler-based PLLs are relatively-difficult to design and optimize,
> and that the effort doesn't seem to bring proportionate rewards in the PN
> department.

My major argument against the use of conventional counter-based loops is noise 
generated in the counters. As counters improve this may not be such a big 
problem. In the meantime, I relish the challenge of trying to get the sampler 
approach to work well!

> > The use of sampling phase detectors for locking microwave
> > oscillators has been
> > standard practice for decades.
>
> Largely because there hasn't been an economical alternative, I suppose.

OK, I agree, but they do work surprisingly well...

> No; you pay the 20*log(N) penalty regardless of whether you use a sampler
> or a counter/PFD.  A key difference, again returning to the example of the
> HP 8753A, is that the sampler LO is probably noisier due to the large
> amount of gain needed to drive the multiplier element.

Of course you can't beat the 20log(N) limit! But noise contributions of 
different kinds from the counter and PFD should be larger than those from a 
good sampling phase detector.

> I'd definitely encourage you to spend some time with the newer Analog
> Devices and Hittite parts before giving up on PFDs. They aren't perfect,
> but they aren't 4046s either.

As I hinted at the top, the reason for my interest in the sampling approach 
comes from experience of exactly those parts! 

I appreciate this opportunity for a discussion!

Thanks!

Chris
GW4DGU



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