[hpsdr] Penelope FPGA code

[Phil Harman]

Hi Ken,

Congratulations on building your Penelope board.  The FPGA code is 
available via SVN at:

svn://206.216.146.154/svn/repos_sdr_hpsdr/trunk/Penelope

There are a number of ways of loading the code into the FPGA.

1. Use the Altera Quartus software with a ByteBlaster or USB Blaster 
(you can home brew the former or I suggest buying a much cheaper clone 
for the latter).
Program the EEPROM using the header on the Penelope board.

2. If you just have an Altera JTAG program then use the technique 
described in the Altera application note (sorry don't have the 
reference on this PC). This enables you to programm the EEPROM FPGA 
boot device via JTAG.

3. If you don't have a JTAG programmer then you can make Ozy look like 
a USB Blaster - Quartus will detect it as such and you program Penelope 
over the Atlas bus.  Bill, KD5TFD,  and I have tested this before but 
it was a while ago and I for one have forgotten the exact steps 
involved.

BTW one of our members is working on some code that will enable you to 
load the EEPROM/CLPD of any board on the Atlas bus via a simple PC 
program.


Please let us know if you need any more assistance.

73's Phil...VK6APH



Quoting "kenklein at austin.rr.com" <kenklein at austin.rr.com>:

> ***** High Performance Software Defined Radio Discussion List *****
>
> Everyone;
>
> I'm just putting the finishing touches on a home-built Penelope and have
> been looking forward to bringing it up.  Unfortunately, I can't find any
> information on loading the FPGA code.  The current manual indicates that a
> separate manual will be provided in the future.  Is the code available?
> Are instructions available for downloading through Ozy?  Info will be
> greatly appreciated!
>
> Thanks and 73,
>
> Ken WR5H
>
>
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