[hpsdr] optimum Tx image rejection in DUC?

[Bill Tracey]

The reason one has to deal with image rejection on QSD/QSE  is 
because you've got IQ in the analog domain and the two analog 
channels are always slightly different so the perfect quadrature 
relationship between IQ cannot be maintained since the I and Q analog 
channels will always be slightly different from each other - just the 
nature of having two different analog channels.

In the DDC/DUC architecture you don't have IQ in the analog world, 
just a plain old real signal (only one channel).  The IQ stuff all 
happens in the digital domain  - since it's all math, there's no 
difference between the I and Q channel processing so no image 
issues.  This is not to say it's perfect ... it's only as perfect as 
the number of bits used in the processing and A/D and D/A channels.

Regards,

Bill

At 08:40 PM 12/26/2009, Ken N9VV wrote:
>***** High Performance Software Defined Radio Discussion List *****
>
>Hi, I am learning about the benefits of DDC for receive where there 
>is no issue of "receiver image rejection" because it is always taken 
>care of in an optimum mathematical manner in the FPGA.
>
>Is the same thing true of a DUC transmitter? is Tx image rejection 
>handled by the FPGA in a mathematically optimum manner?
>
>Image rejection in the QSD type rigs has always been quite a 
>challenge. In the DDC/DUC rigs, no one every mentions it. Does image 
>rejection for both Rx and Tx just disappear in the FPGA?
>
>tnx,
>de Ken N9VV



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