[hpsdr] Atlas slot positions

[Murray Lang]

Ta.

Kirk Weedman wrote:
> Definitely not.  I can explain it in more detail if you really want to 
> know....but basically a clock from one board is going to two or more 
> destinations along the Atlas bus of which the boards can be placed in 
> any order and distance from the source. This is compounded by several 
> of these types of problems.  If you download the schematics for these 
> boards start taking a look at clocks running between them across 
> Atlas.  I plan to eliminate them or reduce them to one source and one 
> destination.
>
> Murray Lang wrote:
>> ***** High Performance Software Defined Radio Discussion List *****
>>
>> Thanks Kirk,
>>
>> Is a plug full of of resistors likely to help with the current 
>> version of Atlas?
>>
>> Murray
>>
>> Kirk Weedman wrote:
>>> Yes, its a termination & design problem. I am working towards a 
>>> solution with a new version of FPGA code for Mercury, Penny, Ozy and 
>>> Janus.  It may be awhile as I've hit some snags along the way.  I am 
>>> fairly new to this group but recognized the design problem soon 
>>> after joining and hope to have a good solution one day.  
>>> Unfortunately, due to the current design there's not really a proper 
>>> way to terminate the signals.
>>>
>>> 73, Kirk Weedman  KD7IRS
>>>
>>> Murray Lang wrote:
>>>> ***** High Performance Software Defined Radio Discussion List *****
>>>>
>>>> Hi all,
>>>>
>>>> I'm stepping outside of my comfort zone here, but it's bugging me 
>>>> enough to risk looking silly or covering old ground.
>>>>
>>>> I gather that the slot position dependencies are the result of data 
>>>> pulses bouncing backwards and forwards along the atlas bus. Is this 
>>>> right? In other words the bus lines are transmission lines and the 
>>>> reflections are the same as we'd see in an unterminated RF 
>>>> transmission line (standing waves and all). Yes?
>>>>
>>>> Can we apply the same solution to Atlas as we'd apply to our 
>>>> transmission lines and apply a correct load or termination? This 
>>>> could be tested by putting a waveform generator on just one of the 
>>>> lines and trying a termination at the end or ends. An oscilloscope 
>>>> would reveal the difference. If it's effective then a card could be 
>>>> built with nothing but terminating resistors for placement in the 
>>>> end slot (or maybe both end slots?). Is the impedance of the bus is 
>>>> already known? At at any rate the best termination value could be 
>>>> found by trial and error pretty quickly, if indeed this is 
>>>> effective at all.
>>>>
>>>> Just a thought.
>>>>
>>>> Murray - VK6HL
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>>>>
>>>
>>
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>


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