[hpsdr] Mercury: Selection of frequency Segments

Phil Harman phil at pharman.org
Mon Jan 5 16:47:15 PST 2009


Hi Alex,

Many thanks for all your input to Mercury.  There are perhaps a number 
of other options we could consider for implementing multiple receivers 
in Mercury.

There is a 20 pin header on Mercury and one on Ozy. This will provide 
for a 16 bit parallel bus plus clock - we would need a suitable ribbon 
cable to connect the two boards.

Alternatively, I recall reading about an Altera Megafunction that is 
intended for FPGA-FPGA communication. I think it uses an internal clock 
at about 600MHz -perhaps use this and a couple of the pins from the 20 
pin header to avoid using the Altas bus.

There are enough spare pins on the Atlas bus to run an 8 bit parallel 
interface if required, latest pin usage is here

< svn://206.216.146.154/svn/repos_sdr_hpsdr/trunk/Atlas/Atlas to Janus 
V2- OzyV2- Penelope  Interface.xls>

73's Phil...VK6APH







Quoting "Alex, VE3NEA" <alshovk at dxatlas.com>:

> ***** High Performance Software Defined Radio Discussion List *****
>
> Hello,
>
> I am working on a multi-receiver project based on the QS1R and Mercury
> hardware. I managed to squeeze 7 independent receiver channels in the
> Cyclone III EP3C25 FPGA - this was not an easy task, I had to rewrite all
> modules from scratch to save logic elements. The Verilog part of the code is
> finished and works fine on QS1R, the USB bandwidth is more than sufficient
> for 7 receivers at 192 kHz, 2x32-bit. The 7-receiver source code is open
> source, it is available on the QS1R SVN server. A number of modules from
> this project are used in the Mercury V.2.x FPGA code.
>
> Implementing multiple receivers in Mercury is more difficult than in QS1R,
> the bottleneck is the serial protocol used to transfer I/Q data from Mercury
> to Ozy. I don't think the 7-receiver code can be ported to Mercury until the
> protocol is changed to 8-bit parallel. Any volunteers to do this?
>
> The PC part of the project is work in progress, currently I only have the
> code that receives seven I/Q data streams via USB - the CPU load is 2% to
> 12% on a dual-core 3-GHz P4, depending on the sampling rate and block size.
>
> 73 Alex VE3NEA
>
>
>
>
>
> ----- Original Message ----- From: "Steven Wilson" <stevew at intrinsix.com>
> To: "Johan Maas" <johan.maas at hetnet.nl>; <hpsdr at lists.hpsdr.org>
> Sent: Monday, January 05, 2009 12:30 PM
> Subject: Re: [hpsdr] Mercury: Selection of frequency Segments
>
>
>> ***** High Performance Software Defined Radio Discussion List *****
>>
>> Johan,
>>
>>> From my understanding of how Mercury works - you would have to modify
>> the FPGA to pull this off.  There are several possible limits that may
>> cause issues.
>>
>> The FPGA implements the DDC, i.e. you create I/Q by taking the raw data
>> in from the A/D and multiply it by a phase angle changing at the
>> frequency band you are listening too.  Consequently, to fit "two"
>> receivers into the single FPGA you would first have to double the entire
>> DDC structure within the FPGA.  The first limit you have to be concerned
>> about is - will this second structure fit into the FPGA.
>>
>> The next limit is can the FPGA spit out a new multiplexed data stream
>> containing both receiver's I/Q data to Ozy, is there enough bandwidth
>> between the two to pull this off.
>>
>> Next is whether there is head-room in the USB communications from Ozy to
>> your host computer.
>>
>> Finally - do you have enough Flops in your computer to process the
>> second receiver.
>>
>> These are some of the limits I can see for an implementation with the
>> current hardware.
>>
>> At the same time, I believe some people are using two Mercury's already
>> - so maybe this is an existence proof of enough bandwidth in Ozy and
>> USB.  (Two mercury's is the more expensive solution ;-)
>>
>> If anyone on the list wants to correct my statements above - then I'll
>> learn something too!
>>
>> 73 de Steve KA6S
>>
>> Johan Maas wrote:
>>> ***** High Performance Software Defined Radio Discussion List *****
>>>
>
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