[hpsdr] OzyII - Design status update

Phil Harman phil at pharman.org
Mon Jul 27 05:55:01 PDT 2009


Many thanks to all those who provided input to the design of OzyII.

I'm new to the world of UDP, TCP, IP etc but rapidly climbing the learning curve so would appreciate those with more experience providing input to the following.

This is what the design team is considering at the moment: 

1. It is not looking cost effective to make OzyII effectively a Single Board Computer (SBC) that could  run say Linux. A better option is to provide a simple interface to a co-locate SBC e.g. Beagleboard.

2. A softcore CPU in the FPGA is not going to play any part in processing Ethernet data at 1Gig. At most it could be used to set up the PHY and various configuration settings and then just get out of the way (much like the FX2 does for USB 2 on the current Ozy board).

3. Whilst Implementing UDP/IP  in the FPGA looks possible we are considering  implementing an appropriate Layer 2 frame protocol which would make the PC code slightly more complex but simplify the FPGA code. 

4. We will need a way to set the MAC address and load code into the FPGA and/or its associated Flash EEPROM.  This could be an Altera Byte/USB Blaster but see below for an alternative.

With this in mind we think the following could be a solution:

To the block diagram shown on the Wiki add an FX2  USB interface, just like that on the current Ozy board.  This would enable us to:

a. Provide compatibility with the existing Ozy board and software.  OzyII could be provided initially with this code and the Ethernet features added later.

b. Use the FX2 as an Altera USB Blaster clone, just like we do now, to load the FPGA Flash EEPROM

c. Use the FX2 USB <> I2C facility to load a Flash EEPROM for the FX2 VID/PID and any program code. This could also contain the cards MAC address, IP address etc.  The USB port can also be used to initially bring the board up and for debugging etc.

d. Rather than a soft core uP,  interface  the FX2 to the FPGA so we can use it to undertake initial UDP  and UPD/IP tasks such as   ARP and DHCP -- if we do choose to go that way.

c. The USB interface can be used to connect the HPSDR to a local PC/SBC without the need to use its Ethernet port. The Ethernet port on the PC/SBC  could then be used to talk to the outside world. 

Without a PC/SBC attached the above configuration would enable the Ethernet port on the OzyII to be connected to a home network and by using  an appropriate Layer 2 protocol  could be accessed over the network.

Bill, KD5TFD, is doing  some initial testing using a Xylo board ( remember this board from the early days!) to see just what we can do in an FPGA and  what protocols pass through a typical home network. 
Again, thanks for all the interest and constructive feedback and I look forward to receiving comments on the above proposal. 

73's Phil...VK6APH 


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