[hpsdr] Call for Comments and Discussion - OzyII

[Steve Bunch]

For those unfamiliar with it, it's useful to look at the USRP 2 at ettus.com (http://www.ettus.com/download for specs) and at GNUradio.org (http://gnuradio.org/trac/wiki/USRP2 for an overview) for background and to see the experience that they've had with this approach.  An Ethernet-connected HPSDR won't have to start from scratch.

USRP 2 is a 1Gb Ethernet-connected SDR board that comprises a very big FPGA, fast A/D D/A converters, and plug-in front-end boards that do the RF capture/output.  It's an expensive product for a hobbiest, but all the USRP and GNUradio code are open-source and you're encouraged to cherry-pick useful bits of it for your own use.  (In fact, I believe that the Ozy USB interface reuses code from the USRP 1).  There is an open-code 32-bit CPU in the USRP 2 FPGA (available on opencores.org), and Matt Ettus sponsored the productization of the Gbit Ethernet core that was on opencores.  The usual software for USRP 1 or 2 is GNUradio, which is primarily oriented at being a toolkit for developing SDR algorithms, though people have developed complete radios using it.  There's a great deal of information on the GNUradio wiki and mailing list about how USRP 2 uses Ethernet, PC-side drivers and software, packet formats being used, etc.

(Other than using USRP 1's for experiments, I have no connection with GNUradio or ettus.com.)

73,
Steve, K9SRB




________________________________
From: Chris Albertson <albertson.chris at gmail.com>
To: Henry Vredegoor <henry.vredegoor at gmail.com>
Cc: hpsdr at openhpsdr.org
Sent: Monday, July 20, 2009 1:17:25 PM
Subject: Re: [hpsdr] Call for Comments and Discussion - OzyII

***** High Performance Software Defined Radio Discussion List *****

On Mon, Jul 20, 2009 at 8:47 AM, Henry
Vredegoor<henry.vredegoor at gmail.com> wrote:
> ***** High Performance Software Defined Radio Discussion List *****
>
> Hi Phil,
>
> Last weekend I studied your proposal for a future, new Ozy, OzyII and gave
> it some thought.

> I think the implementation of the full Ethernet/TCP-IP functionality in an
> FPGA is a difficult and complex task and will take a lot of development
> time. (witch could be better spent for "real" HPSDR work ..... :-)  )
>
> I think a real microprocessor based system, maybe an SOC (System On a Chip),
> running a (micro-) version of Linux, maybe assisted by some FPGA hardware
> and an added high speed LVDS interface to the ATLAS-bus interface would be a better approach.

If the FPGA is big and fast enough you can implement a CPU core in the
FPGA.  If you do this then you actually save chip count and complexity
by not having the CPU chip.

I agree that you want a CPU powerful enough to run a general purpose
OS.  I think that there are free ARM and free SPARC cores available.
SPARC may have the best and most mature OS support.   The other thing,
is that if a full OS kernel is running then you will need a bit of RAM
and that has to be planned for now.

I think using Ethernet in place of USB will open up a lot of new uses.
The big advantage of Ethernet is the maximum length of the cable.  A
long data cable means you can place the HPSDR box very close to the
antenna.  Maybe even outdoors in a die cast aluminum box then run a
fiber cable back to the computer.

No antenna feed and no antenna feed losses either.



-- 
=====
Chris Albertson
Redondo Beach, California
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