[hpsdr] Call for Comments and Discussion - OzyII

Chris Albertson albertson.chris at gmail.com
Mon Jul 20 11:17:25 PDT 2009


On Mon, Jul 20, 2009 at 8:47 AM, Henry
Vredegoor<henry.vredegoor at gmail.com> wrote:
> ***** High Performance Software Defined Radio Discussion List *****
>
> Hi Phil,
>
> Last weekend I studied your proposal for a future, new Ozy, OzyII and gave
> it some thought.

> I think the implementation of the full Ethernet/TCP-IP functionality in an
> FPGA is a difficult and complex task and will take a lot of development
> time. (witch could be better spent for "real" HPSDR work ..... :-)  )
>
> I think a real microprocessor based system, maybe an SOC (System On a Chip),
> running a (micro-) version of Linux, maybe assisted by some FPGA hardware
> and an added high speed LVDS interface to the ATLAS-bus interface would be a better approach.

If the FPGA is big and fast enough you can implement a CPU core in the
FPGA.  If you do this then you actually save chip count and complexity
by not having the CPU chip.

I agree that you want a CPU powerful enough to run a general purpose
OS.  I think that there are free ARM and free SPARC cores available.
SPARC may have the best and most mature OS support.   The other thing,
is that if a full OS kernel is running then you will need a bit of RAM
and that has to be planned for now.

I think using Ethernet in place of USB will open up a lot of new uses.
 The big advantage of Ethernet is the maximum length of the cable.  A
long data cable means you can place the HPSDR box very close to the
antenna.  Maybe even outdoors in a die cast aluminum box then run a
fiber cable back to the computer.

No antenna feed and no antenna feed losses either.



-- 
=====
Chris Albertson
Redondo Beach, California

 1248113845.0


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