[hpsdr] Come and get it, code's ready!

[Bill Tracey]

All,

Thanks to the great work done by Kirk KD7IRS we have new version of 
FPGA code for all the HPSDR boards.  The latest versions completely 
removes any remnants of board position sensitivity and should also 
allow operation at 192k/2048k on PC's that previously had difficulty 
with these rates.

The new code also improves the performance using John Melton's GTK+ 
Linux console -

< http://javaguifordttsp.blogspot.com/ >.

It is also essential for use with the shortly to be released Windows 
K.I.S.S. Konsole.

In order to make use of this new code the ROMs on Penny and Mercury 
boards must be updated. If you're using Janus with Mercury and/or 
Penelope you will need to update it as well.   A new version of 
PowerSDR that has the new Ozy and FX2 code has been posted.

The latest version numbers are:

Mercury - V2.7
Penelope - V1.2
Janus - V3
Ozy - V1.3
FX2 -  20090524

The procedure to update the CPLD or EEPROMs on the various boards is 
the same as before.  Use SVN to check out the files from

< svn://206.216.146.154/svn/repos_sdr_hpsdr/trunk/USBBlaster-Binaries >

and follow the instructions in the README.txt file.

You must also use the latest Ozy_Janus.rbf, ozyfw_sdr1k.hex 
and  PowerSDR files which can be obtained from the usual SVN place:

< 
svn://206.216.146.154/svn/repos_sdr_windows/PowerSDR/branches/kd5tfd/PennyMerge/bin/Release 
  >

At this time Janus is only working well at 192khz, so PowerSDR is 
currently setup to use the prior version of Ozy and FX2 firmware when 
configured for an SDR 1000 + Janus setup.  If that's you're 
configuration it is not recommended to update the Janus CPLD code at this time

As before please report any successes or problems via the HPSDR mail reflector.


Phil (VK6APH)
Bill (kd5tfd)