[hpsdr] Data syncs with the FPGA code

[David Larsen]

Steve --

  I am explaining what Phil said on the Teamspeak session last week.  
Phil follows these list discussions and I expect to talk with him 
tonight on Teamspeak.  I will make sure he hears your suggestion.

I have not tried the new code but those that have say that it makes a 
big difference.  I, like you, am very interested in the new FPGA code.

This has been a very big programming project.  Many Thanks to Kirk, Phil 
and others on this work.

   Dave, KV0S

Steven Wilson wrote:
> ***** High Performance Software Defined Radio Discussion List *****
>
> I'm curious if they could/would be willing to release a beta on the
> current code that doesn't include Janus?
>
> Many of us are running pure HPSDR systems without Janus now.  The system
> described would be useful without Janus (realizing there is still a
> contingent that DOES use Janus...)
>
> Steve KA6S
>
> David Larsen wrote:
>   
>> ***** High Performance Software Defined Radio Discussion List *****
>>
>> Aivars --
>>
>>  Kirk, KD7IRS and Phil, VK6APH are working on a new version of the
>> FPGA code that will eliminate many of the sync problems that are in
>> previous versions of the FPGA code.  The problem is that this is a
>> redesign in how the cards use the atlas buss, so previous FPGA code
>> will not work with the new code.  ALL FPGA have to updated together to
>> be compatible.   Kirk and Phil have most of the code fixed but are
>> still working on the Janus FPGA code.  This will be released soon.
>>
>> As for the motherboard you mentioned, 1.2 Ghz computers have been used
>> to run powerSDR and it should run if you are not running too many
>> other programs at the same time.  I have not used that motherboard so
>> have no personal experience.
>>
>> I would wait to see if the new FPGA code fixes these problems and then
>> experiment with powerSDR on different computers to see if you get a
>> difference.
>>
>>  Dave, KV0S
>>
>>
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