[hpsdr] D201GLY2A???

[Steven Wilson]

I'm curious if they could/would be willing to release a beta on the
current code that doesn't include Janus?

Many of us are running pure HPSDR systems without Janus now.  The system
described would be useful without Janus (realizing there is still a
contingent that DOES use Janus...)

Steve KA6S

David Larsen wrote:
> ***** High Performance Software Defined Radio Discussion List *****
>
> Aivars --
>
>  Kirk, KD7IRS and Phil, VK6APH are working on a new version of the
> FPGA code that will eliminate many of the sync problems that are in
> previous versions of the FPGA code.  The problem is that this is a
> redesign in how the cards use the atlas buss, so previous FPGA code
> will not work with the new code.  ALL FPGA have to updated together to
> be compatible.   Kirk and Phil have most of the code fixed but are
> still working on the Janus FPGA code.  This will be released soon.
>
> As for the motherboard you mentioned, 1.2 Ghz computers have been used
> to run powerSDR and it should run if you are not running too many
> other programs at the same time.  I have not used that motherboard so
> have no personal experience.
>
> I would wait to see if the new FPGA code fixes these problems and then
> experiment with powerSDR on different computers to see if you get a
> difference.
>
>  Dave, KV0S
>
>
> _______________________________________________
> HPSDR Discussion List
> To post msg: hpsdr at openhpsdr.org
> Subscription help:
> http://lists.openhpsdr.org/listinfo.cgi/hpsdr-openhpsdr.org
> HPSDR web page: http://openhpsdr.org
> Archives: http://lists.openhpsdr.org/pipermail/hpsdr-openhpsdr.org/


 1243013081.0