[hpsdr] Hermes Peer Review

[Phil Harman]

Hi Van,

Thanks for your feedback - comments in your original email below.

73's Phil...VK6APH


> ***** High Performance Software Defined Radio Discussion List *****
>
> This is a great effort.
>
> General Comments:
> 1.	Build in rigorous diagnostic and self-test. LED's alone are not
> sufficient.

The JTAG interface allows us to load specific diagnostic software during
manufacturing to test specific sections of the board. We have done this in
the past with other HPSDR FPGA projects very successfully.

The JTAG port on the Alter FPGA allows us to actually look inside the
device whilst it is running - like a logic analyser - it's so much more
than just a programming port.

We also have TTL level RS232 available from the FX2 - we used that on Ozy
-invaluable for initial board bring-up.

> Untold hours are wasted from difficult to find bugs.

Amen.  Hermes is an amalgamation of a number of previous HPSDR projects.
Apart from the audio amplifier* all the code and hardware has either been
used before or we have prototyped it. It **should** just be a matter of
connecting the various building blocks of previous proven code.

I have already connected an LT2208 directly to an 2C8 FPGA + FX2 + DAC and
have that code running 100% OK.

*having said that - Murphy's law states that it will be unstable :-)

> 2.	Inputs and outputs from all sections should have ability to
> self-test.

We could use the output of Penny as a signal generator to test the receive
side - need some Verilog help  here :-)


> 3.	I can write a platform-independent display program to show self-test

Great - you are now officially on the Hermes team!

> 4.	Add temperature, voltage and current sensing to critical fan-in and >
fan-out points.

We have spare ADC inputs so possible


> 5.	Socket and fuse vulnerable components.

Resetable fuses fitted to high current 12v items. All SMD so not much can
go in sockets.

> 6.	Eliminate JTAG interface.

No, it provides great test and diagnostic services - it's not just to
program the FPGA.


> 7.	Consider Gigabit Ethernet instead of USB2 to enable QS1R/USRP2
> server architecture.
>

I have a prototype OzyII that uses Gigbit in the development phase -
although looking very good its too early to commit for Hermes.  We want to
reduce the technical risk as much as possible - hence where possible we
are re-using existed, proven, hardware and software.


> Specific Comments:
> 1.	Add internal GPS disciplined oscillator.

Wont fit on the PCB - we have allowed for an external 10MHz reference -
this can be GPS locked if required


> 2.	The Linear LTC2208 ADC is a great part. It is extremely layout
> sensitive. Contact David Dinsmore Field Applications Engineer for Linear
> Technologies (referred by Van Warren). 2208 creates self-interference and
> uses a special error correcting code strategy to get around this. It
> requires six layer board with ground planes on top and bottom.

We used this successfully on the Mercury receiver so will just copy the
layout.


> 3.	Add complementary stereo line in, for symmetry with line out.

Noted


> 4.	Be generous in thermal analysis. Instrument hot spots accordingly.

Noted.  The LTC2208 is the hot spot.


>


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