[hpsdr] HERMES schedule question

[Ray Page]

Graham,

Now that's a great application I haven't thought of! It would be straight
forward to time-align in increments of ~ 8 ns back at the main processing
board. But I can envision phase shifting the 122.88M sampling clock in the
RX modules to give a vernier effect. I'll first have to make sure that the
SERDES transmit buffers in the Altera device support arbitrary phase
relationships between RX and TX domains. It probably does. This deserves
further thought.

Thanks,

-Ray Page
Georgetown, TX



On Fri, Jun 18, 2010 at 11:01 PM, Graham / KE9H <KE9H at austin.rr.com> wrote:

> Ray:
>
> Please allow some thought for accurate clock distribution in the system,
> and time adjustment,
> so multiple boards of whatever the end product looks like, at the end of
> various lengths of fiber,
> can be timed/time-synced to a few nanoseconds and used in an HF phased
> array.
>
> --- Graham / KE9H
>
> ==
>
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