[hpsdr] OzyII schematic available for peer review

[Phil Harman]

Dave,

> A minor thing -- The description of U13 should say 512K x 8, rather than 
> 512 x 8    ---- Fixed

> I'm a bit puzzled by the pin Names on U6-E, because there are quite a few 
> duplicates, while on U6-B all are different. -- as long as they are all IO 
> pins then not a problem.

> The description of U7 might be a little more informative -- Fixed


> I see jumpers (MSEL2,1,0) labeled as selecting one of four modes for
> programming the FPGA--AS, PS, FPP, & JTAG.  Which do you use?  and does
> that use an Altera USB-Blaster?

As shipped, U13 will contain two FPGA images, a factory boot loader image 
and a user image.  The boot loader will allow the user image in U13 to be 
updated via the Ethernet.  We will use jumpers JP1 and JP2 to select either 
boot or user image at power on - as well as other future uses.

I've already tested dual booting (thanks to help from Mike,  N3UC ) and it 
works fine.

Alternatively, U13 can be programmed using an Altera (or clone ) USB/Byte 
Blaster. Unlike Ozy  and Magister there is no FX2 uP on Ozy II that we can 
use to elmulate an USB Blaster - just not enough FPGA pins/PCB area to fit 
it all in.

Initial tests of programing U13 via the Ethernet port look encouraging as 
does being able to program other FPGAs on the Atlas bus via the JTAG chain.

We need to be able to do this with the current Ozy/Hermes boards also for 
folks who run Mac OS and Linux - Jeremy NH6Z is working on the PC code to 
enable this.

Thanks for the eagle eyes!

73's Phil...VK6APH






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