[hpsdr] PowerSDR v1.19.3.1.diversity9 (K5SO 5OCT2010)

[Joe Martin K5SO]

All,

Phil is correct.  It is not necessary to install a twisted wire pair  
jumper between the Mercury boards if in PowerSDR you

1) select Setup>Excalibur, then on the Mercury boards

2) place a jumper on the CLKSEL "I" pins (lower two pins of the three  
CLKSEL pins) on each of the Mercury boards,

3) place a jumper on JP9 (enabling the 122.88MHz oscillator) on each  
Mercury board

4) place a jumper from the Atlas C16 pin to J8 (Aux Clk input) pin  
nearest the FPGA

In which case both Mercury board 122.88 MHz oscillators will be locked  
to the 10MHz clock on Atlas C16 coming from Excalibur (or whatever  
external 10 MHz source you use).

I also recommend this configuration over the twisted wire pair  
jumper.  I will adjust the instructions accordingly and remove the  
photos of the jumpered Mercury boards on the website and references on  
the Wiki.

Thanks, Phil.  It's better not to have jumpers between the boards, for  
sure.

73,  Joe K5SO



On Oct 6, 2010, at 6:19 AM, Joe Martin K5SO wrote:

> ***** High Performance Software Defined Radio Discussion List *****
>
> Hi Phil,
>
> Okay, I'll check that out.  Sounds easy.  I know that both of my  
> Mercury boards I use a jumper from Atlas C16 to the Aux Clock input  
> to get the Excalibur clock to the FPGA Aux Clock input pin.
>
> Thanks.  Have  a great trip!
>
> 73,  Joe K5SO
>
>
> On Oct 5, 2010, at 9:40 PM, Phil Harman wrote:
>
>> Hi Joe,
>>
>> You should be able to do that with the existing code.  If you  
>> select the 122.88MHz clock for both boards and in PowerSDR select
>>
>> Hardware Config > Excalibur
>>
>> then both boards should lock to a 10MHz clock from Excalibur (or a  
>> suitable 10MHz clock on Atlas pin C16).
>>
>> We did do a mod to the Mercury code some time ago to use a PLL to  
>> divide the 10MHz rather than a counter - this gave much lower phase  
>> noise.  In which case you ran a wire from C16 on Mercury to the Aux  
>> Clock input (J8) from memory.
>>
>> You may want to check the code to see which is currently being used  
>> to take the external clock input from C16 - either direct from that  
>> pin or via a PLL using J8.
>>
>> 73 Phil...VK6APH
>>
>>
>
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