[hpsdr] Penny FPGA Load

[Phil Harman]

Spot on John :)

73 Phil....VK6APH


----- Original Message ----- 
From: "John Melton" <john.d.melton at googlemail.com>
To: <phil at pharman.org>
Cc: "Joe Martin K5SO" <k5so at valornet.com>; <hpsdr at lists.openhpsdr.org>
Sent: Thursday, July 14, 2011 3:50 PM
Subject: Re: [hpsdr] Penny FPGA Load


> OK - I think I understand it now ;-)  I had always read it as the Metis
> board needs to be in the connector farthest from the Power connector so
> was assuming it meant J1.
>
> So the valid setups are (M=Metis,T=Penelope/PennyLane/Mercury,E=Empty)
>
> J1  J2  J3  J4  J5  J6   Power
> M   T   E   E   E   E
> E   M   T   E   E   E
> E   E   M   T   E   E
> E   E   E   M   T   E
> E   E   E   E   M   T
>
> -- John
>
> On Thu, 2011-07-14 at 15:27 +0800, Phil Harman wrote:
>> ...it means just what I choose it to mean — neither more nor less. ...
>> (Humpty Dumpty - Alice through the looking glass).
>>
>> OK - how about
>>
>> "the Metis board and target board need to be in any adjacent Atlas slots
>> with the target board directly facing the power connector and not 
>> obscured
>> by the Metis board"
>>
>> Phil...
>>
>> >
>> >> It doesn't matter what pair of Atlas bus sockets you use as long as 
>> >> they
>> >> are adjacent and Metis is farthest from the Power Connector.
>> >>
>> >
>> > That is a bit contradictory as it implies that is does not matter, but
>> > states that Metis MUST be farthest from the Power Connector (i.e. J1)
>> > and the other board MUST be in the adjacent connector (i.e. J2).
>> >
>> > -- John
>> >
>> >
>> >
>> >
>>
>>
>
>
>
>
>
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