[hpsdr] Introduction and request for feedback

[Rob Frohne]

Hi Mark,

Welcome!  Good to see you on the hpsdr group.  Another similar SDR is 
the one Jim Ahlstrom, N2ADR, built. <http://james.ahlstrom.name/>.  It 
is a bit simpler than Hermes.  Another interesting one was built by 
Pieter, PA3FWM <http://websdr.ewi.utwente.nl:8901/>.  Glad to see your 
interest in SDR.  It is lots of fun.

73,

Rob
KL7NA
On 08/30/2012 05:19 PM, Mark Haun wrote:
> ***** High Performance Software Defined Radio Discussion List *****
>
> Hi everyone,
>
> I just joined the list a couple days ago, hoping to get some feedback on a
> possible SDR project I have in mind.  A bit about me:  licensed at age ten,
> operated a fair bit through elementary and high school, but not much since.
> I now have graduate degrees in EE and do ultrasound beamforming and
> signal-path design for a living.  On the hobby side I've been dabbling more
> with hardware in recent years, after discovering how easy and cheap it is to
> get professional PCBs made and do SMT soldering at home.  My most ambitious
> design thus far has been a Spartan-6 daughtercard for the Pandaboard (TI
> OMAP4 dev board) with some A/D and D/A--still far short of the OpenHPSDR
> projects' complexity, but enough to whet my appetite, so...
>
> I'm considering a DDC/DUC-based SDR platform optimized for low-power and
> [relative] simplicity, compared to more ambitious designs like OpenHPSDR
> Hermes.  (Of course, I'm also hoping someone can point me to other projects
> I haven't seen yet, with similar goals.)  Tradeoffs and differences versus a
> board like Hermes would be (a) only one analog input and one output, (b)
> slower ADC, perhaps 65 MSPS, or even lower with bandpass sampling, (c) fewer
> ADC bits (probably 14), and (d) design focus on self-contained operation,
> with on-board host processor and audio codec for headphones.  I intend to
> aim for total system power of ~2 watts--half a watt combined for ADC and
> DAC, one watt in the FPGA, and another half a watt for the host CPU and
> peripherals.  Obviously this may not be achievable, but it's a good ideal.
>
> Xilinx Zynq (28-nm FPGA fabric with dual-core Cortex A9 on chip) could be a
> great platform for this, except I really don't forsee the need for
> full-blown Linux and that much CPU.  I realize these things end up in cell
> phones with tiny batteries, but in my experience (Pandaboard) the Linux
> support packages have rather poor power-management features, and I don't
> want to run Android on the thing :)  So I think 1/2 watt is likely not
> achievable with that class of processor.  However, the new Cortex-M4
> microcontrollers, e.g. NXP LPC43xx, are capable of quite a bit of DSP at
> audio bandwidths and should be more than sufficient.  As usual, it's a
> tradeoff between ease of development, and power efficiency.
>
> So my current working plan is something like the smallest Artix-7 FPGA
> (which is actually enormous), a Cortex-M4, low-power ADC, low-power DAC, one
> of the TI low-power audio codecs, and perhaps a bit of SDRAM.  A four-layer
> board on OSH Park's PCB service (oshpark.com, 6 mil / 6 mil trace/space).
> No more than three supply rails: 3.3, 1.8, and FPGA core.  Oh, and I'm
> hoping to steal some of the analog RF circuitry from an existing design, as
> it's my weakest area.
>
> I realize it could be up to a year before the 28-nm FPGA price/availability
> is reasonable, but I'm not going to design this thing overnight anyhow.
>
> Thoughts?  Probably someone has been down this path already.  I would like
> to hear your suggestions, criticisms, etc.
>
> 73,
>
> Mark KJ6PC
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-- 
Rob Frohne, Ph.D., P.E.
E.F. Cross School of Engineering
Walla Walla University
100 SW 4th Street
College Place, WA 99324
(509) 527-2075			 http://people.wallawalla.edu/~rob.frohne

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