[hpsdr] SWR Problems with PennyLane

[Phil Harman]

Hi Mark,

All your jumpers are set correctly and you have the correct version of code 
loaded.

1. Has this board worked before?
2. Is you 12v supply connected and working?
3. Please do the voltage check that Scotty suggested so we can see that the 
drive control is working.

73 Phil....VK6APH

-----Original Message----- 
From: Mark Leone
Sent: Monday, February 06, 2012 2:12 PM
To: hpsdr at lists.openhpsdr.org
Subject: Re: [hpsdr] SWR Problems with PennyLane

***** High Performance Software Defined Radio Discussion List *****

Thanks Phil and Scotty. I looked at JP2, and I don't see labels
indicating pin numbers. It was configured with the middle and right pins
jumered, which I think was labeled Int. I tried jumpering the left to
middle pin, which I think was labeled Ext, but this didn't help.

I'm wondering if I'm missing a document. The only document I've found
that discusses jumper settings is the Penelope manual. It gives a photo
of standard jumper settings but doesn't say what each jumper does (apart
from the discussion of the three mic-setting jumpers). And of course the
physical layout for PennyLane is different, so setting jumpers by photo
comparison doesn't work.

On PennyLane, I have the following jumpers set, which is how the board
came configured: JP7, JP10, and JP11 have jumpers present. There are two
three-pin vertically oriented jumpers near the center of the board,
which aren't labeled with JP numbers, but have the text Config A and
Config B. These jumpers are both set to connect the middle and bottom
pins. No other jumpers on the board are set.

73

Mark - K4XML

On 2/6/12 12:07 AM, Phil Harman wrote:
> ***** High Performance Software Defined Radio Discussion List *****
>
> Hi Scotty,
>
> I've just sent exactly the same reply.  How the voltage is sent depends on
> how the person did the coding - you can be sure that it will be there on
> Tx.
>
> 73 Phil....VK6APH
>
>
>> ***** High Performance Software Defined Radio Discussion List *****
>>
>> Hi Mark,
>>
>> Make sure that there is a jumper on JP2 pins 1-2. That jumper is used
>> to separate the DAC/filter circuitry from the PA stages. If it is
>> missing (or on pins 2-3), you will get no output.
>>
>> If you want to check the "drive" level to the ADC, you can put your
>> meter on J7 pin 17. This should be a voltage level commensurate with
>> the drive control. (This point is also the junction of C23 and R45,
>> which might be easier to put your probe on than the fine-pitch IC
>> pin.)  If you get zero volts there, it is probably because you either
>> are using an old revision of Pennylane/Penelope FPGA code, or you
>> have checked "Penelope" instead of "Pennylane" in the setup.  Just
>> something to look at if you want to dig into it.
>>
>> The voltage may only be there during transmit, maybe Phil could
>> answer that question.
>>
>> 73,
>> Scotty WA2DFI
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