[hpsdr] SunSDR2 - new TRX

Joe Martin K5SO k5so at valornet.com
Sun Jun 3 12:19:37 PDT 2012


Hi Alex, 

The 4 Rx implementation we use simply copies the code for a single Rx into other locations for the multiple receivers, so size required scales linearly with the number of receivers implemented.  If that approach is taken, no more than four such units will fit in the FPGA (with all the Tx and other code that is present in Hermes).  

Without knowing specifically how you implement your 7 receivers I really can't comment definitively on the differences.  I imagine that you can comment on that better than I.  Is it possible that in your QS1R code you use less decimation in the FPGA (resulting in a coarser step resolution) and then perhaps later apply more processing/decimation to the stream on the PC side?  Or is the additional overhead of ethernet, transmit, and other features inherent in the Hermes FPGA  taking up the additional space that the Rx-only QS1R doesn't have to worry with?  

73,  Joe K5SO

On Jun 3, 2012, at 12:32 PM, Alex VE3NEA wrote:

> ***** High Performance Software Defined Radio Discussion List *****
> 
> Hi Joe,
> 
> I am very surprised that only 2 or 3 receivers is the realistic loading of Hermes. I have 7 receivers implemented in the EP3C25 FPGA of QS1R, and I was hoping that Hermes, with its EP3C40 chip, would allow even more receivers. What is the bottleneck?
> 
> 73 Alex VE3NEA
> 
> 


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