[hpsdr] Getting PowerSDR to display SWR

[John Westmoreland]

HPSDR,

I think it makes more sense for PowerSDR to do this computation than doing
it on PennyLane - both the Forward and Reflected Power are transmitted to
PowerSDR in the packet transmission.
(assuming the SWR cable and Alex is being used; of course.)

Since doing fast floating point on the PC is so much simpler and faster -
why wouldn't we want to do the computation there?

SWR = (1 + SQRT(ABS(Pr/Pf))  /  ( 1 - SQRT(ABS(Pr/Pf)      rho =
SQRT(ABS(Pr/Pf) - then
SWR = ( 1 + rho ) / ( 1 - rho )

The ABS may be superfluous in this case since the ADC can't read negative I
suppose.

Seems simpler to do on the PC side with the current architecture.  Am I
missing something here?

73's,
John
AJ6BC

On Thu, Mar 8, 2012 at 11:45 AM, John Westmoreland <
john at westmorelandengineering.com> wrote:

> Phil & HPSDR,
>
> OK - took a look at the code and have some test code implemented - issue
> is using real #'s in the Verilog environment for the FPGA; specifically -
> two functions, square root and absolute value are needed to compute SWR
> correctly from the current hardware configuration.  Another possibility is
> if Voltage or Current can be extracted - then that would make the
> calculation simpler.
> From some rough testing I did sending an SWR test value over vs. the
> Reflected Power - looks like it was working.  To be sure I will want to
> review the code for PowerSDR though.
>
> 73's,
> John
> AJ6BC
>
>
> On Wed, Mar 7, 2012 at 6:07 PM, John Westmoreland <
> john at westmorelandengineering.com> wrote:
>
>> Hello Phil,
>>
>> If this can be implemented in PennyLane then that is great.
>>
>> I will take a look at the source and see what it will take.
>>
>> 73's,
>> John
>> AJ6BC
>>
>>
>> On Wed, Mar 7, 2012 at 4:39 PM, Phil Harman <phil at pharman.org> wrote:
>>
>>>   Hi John,
>>>
>>> Your correct, we did look at this before.  From memory the issues is
>>> that there is a delay between the FWD and REV samples that means for  other
>>> than a steady carrier the SWR reading is meaningless.  I think this was a
>>> problem with the Flex hardware but not sure if we will have the same
>>> problem.
>>>
>>> The solution may be to calculate the SWR in the FPGA on Penny(Lane)
>>> since that will have the least sample delays.
>>>
>>> 73 Phil...VK6APH
>>>
>>>
>>>
>>>  *From:* John Westmoreland <john at westmorelandengineering.com>
>>> *Sent:* Thursday, March 08, 2012 3:37 AM
>>> *To:* HPSDR list <hpsdr at lists.openhpsdr.org>
>>> *Subject:* [hpsdr] Getting PowerSDR to display SWR
>>>
>>> ***** High Performance Software Defined Radio Discussion List *****
>>>
>>>  ------------------------------
>>> HPSDR,
>>>
>>> I am sure this has been discussed before - but I can't seem to find it
>>> in the archives.
>>>
>>> Is there a way to get PowerSDR to display SWR on the TX Meter?  In the
>>> configuration settings there is a box to pick for this - but when you run
>>> there is not a way to select SWR.
>>> Reflected Power is there - but not SWR.
>>>
>>> Thanks in Advance.
>>>
>>> 73's,
>>> John
>>> AJ6BC
>>>
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