[hpsdr] openHPSDR at the forefront of SDR development

[Joe Martin K5SO]

A personal comment regarding FPGA programming and programming in general: 

The view that writing and maintaining FPGA code is beyond the capability of most of us has been blown completely out of proportion to reality!  That view is simply incorrect.

Indeed, I’m a good example of the point, I think.  As many of you know, I am certainly not a professional programmer and, in fact, I have had no serious programming experience at all in any computer language in my life.   Since joining the HPSDR community a few years ago I have managed to muddle my way along in learning how to successfully write both FPGA code and  PowerSDR (C# and C) code and have discovered that it simply isn’t that hard to do.  I readily admit that my code isn’t “elegant” in the purist view but it works (sometimes anyway, hihi).  The point I’m trying to make is that you only have to be willing to learn something new, that’s all, and not be too timid to give it a try to ultimately become successful in doing ANY of the programming we do.  Indeed, it turns out that even the often-viewed-as-no-man’s-land of timing FPGA designs is actually completely accessible to non-professionals such as we are and, in fact, the task is easily within the grasp of the average experimenter.  

Further, we have always used and are still using free versions of Quartus II to create FPGA designs and load the FPGAs without problem.  You don’t have to have the fully licensed Quartus II versions to do anything we wish to do with these FPGAs.  

Counter to what one might assume from the recent discussions, any of us can do FPGA programming with the free tools we have available from Altera if you only care to put the effort into learning how to do it.  It just isn’t that hard!  I’m certainly no expert in any of this stuff and would never claim to be but you don’t have to be an expert to be able to learn to work with these tools and be able to make meaningful contributions.  

There is no reason at all that only a small percentage of our group can do FPGA programming!  The truth is that anyone can do it if you set your mind to do it.  

73, Joe K5SO


On Aug 23, 2014, at 10:26 AM, Rob Crewson wrote:

> ***** High Performance Software Defined Radio Discussion List *****
> 
> Hi Steve,
> 
>   I have been  looking OpenCL for a couple of months by taking some online
> courses. 
>   Of note is that NVidia also belongs and supports the consortium.
> 
>  Unfortunately in the last one of the series (just watched it today ), it
> mentions that a fully  licensed  of QuartusII 
>   is needed  in order to actually get compiled code generated and loaded on
> a FPGA.
> 
>  I did not check the development  board costs at that point but they are
> licensed for a fee as well.
> 
> 73,
> 
> Rob Crewson  - VE3EW
> 
> 
> 
> -----Original Message-----
> From: Hpsdr [mailto:hpsdr-bounces at lists.openhpsdr.org] On Behalf Of Steven
> B. Dick
> Sent: Saturday, August 23, 2014 11:13 AM
> To: hpsdr at lists.openhpsdr.org
> Subject: Re: [hpsdr] openHPSDR at the forefront of SDR development
> 
> ***** High Performance Software Defined Radio Discussion List *****
> 
> Phil, as you indicated, The skills to write, debug and maintain FPGA code
> is only available via a small percentage of software engineers, or
> enthusiasts, in comparison to those able to write code for PC based
> hardware. This has been a major problem in industry for years, as the cost
> per "line of code" is much higher for firmware vs. software for code
> development and maintenance, on the order of a factor of perhaps 10 to 1 for
> FPGA firmware vs. software written in a high order language.  Note that
> tools such as MATLAB can be used to develop FPGA code directly rather than
> hand coding verilog or VHDL code but are not low cost tools.
> 
> Another approach to consider is the newly emerging FPGA vendor support of
> high order "graphics" programming languages for their latest "System on a
> chip" FPGAs. Both Altera and Xilinx are now beginning to support the OpenCL
> programming language for their FPGAs using their latest toolsets. OpenCL is
> not proprietary vs. CUDA which is tied in with NVIDIA. CUDA is more mature
> and has a more extensive set of available libraries and a larger user
> community however. Although programming with OpenCL on an FPGA vs. a
> graphics chip using multiple graphics processing engines requires different
> programming approaches to take best advantages of the underlying hardware
> resources, this may be a way to program for "System on a chip" FPGAs,
> strictly in software though maintining a mix of hardware and software
> resources, including multiple ARM processors. 
> 
> Regards. "Digital Steve", K1RF   
> 
> -----Original Message-----
> All,
> 
> I'm delighted to be able to report that we have been able to develop, to
> proof-of-concept stage, a new SDR architecture.
> 
> Current SDRs use the software equivalent of zero IF techniques, i.e. DDC,
> in order to provide (multiple) receivers.   Whist this is quite effective,
> much of the initial DSP work is done using FPGAs, or a combination of FPGA
> plus dedicated DSP chips and microprocessors, rather than totally within the
> PC.
> 
> As more complex features are added, the size and complexity of the FPGA and
> DSP code increases. The skills to write, debug and maintain this code is
> only available via a small percentage of software engineers, or enthusiasts,
> in comparison to those able to write code for PC based hardware.
> 
> ***********************
> 
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