[hpsdr] Hermes 2208 chip

[Joe Martin]

Hi Glen, 

Yes, the principal clock for the FPGA for most of the activity within it comes from the 122.88MHz source via the LTC2208 ADC.  The 125MHz clock is mostly to run the PHY chip (ethernet).  

73, Joe K5SO

On Apr 9, 2015, at 7:35 AM, MDS Info wrote:

> ***** High Performance Software Defined Radio Discussion List *****
> 
> Hello,
> 
> I removed the 2208 chip from the board, thinking it might be my problem, and
> the board is now completely dead except for
> power supplies.
> 
> I guess the cpu clock does come from the 2208, even though it looks like
> there is a separate 125Mhz clock input to the
> FPGA.
> 
> Comments???
> 
> 73's
> 
> Glen K4KV
> 
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