[hpsdr] DFC Sampling Frequency?

[Hal Murray]

> Since Hermes Lite uses only a 14bit ADC its theoretical bandwidth in DFC
> could be reduced, however performing the expansion of packed 14bit values
> into byte aligned memory on the host might be rather expensive. 

I'd expect the limiting factor would be memory bandwidth.  If so, it would go 
as fast as a copy.  The CPU should be fast enough to do the shifting and 
masking while waiting for the memory.

Does anybody know of subroutines to do the packing or unpacking?

If this is an interesting area, I'll try to collect some timing data.


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