[hpsdr] Angelia external clock input?

[Glenn Elmore]

Jim,
I can't provide any information as to a consensus but after studying my 
new Angelia and analyzing why it didn't lock properly with an external 
input, I came to the conclusion that the differential pair 
external-10MHz condition circuit, which is essentially RTL, does not 
have sufficient drive capability to provide the fast edges into the PC 
track/TL and loading of the FPGA input.
Mine almost worked on receive but came unglued on transmit.

I wrote to Apache Labs who kindly sent me a new board - just installed 
last night.  This board appears to solve the problem by inserting a fast 
totem-pole output logic driver between the diff pair and the FPGA 
line/input.  The result is that my Angelia now works properly on both 
receive and transmit.

I can see no combination of input levels or wave shape that will likely 
accomplish this same goal.  I think you need a daughter board or the 
equivalent.

Just my opinion, not a consensus.

Glenn n6gn

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