[hpsdr] Alex Interface Issue on Hermes

[john_eckert at keysight.com]

Hi Don,

I'm using an Angelia board, but the protocol is the same.   In my case I am using a Cortex ARM micro to decode the Alex SPI data.  The only time data or clock are active is when a relay needs to be switched.  So sitting on one band and just listening there will be no data or clock.  The Alex chips are not true SPI chips, but rather serial to parallel converts.

What happens with this Alex interface is that both the high and low pass filter chips have their clock and data lines connected together.  Only the chip with its load pin active loads the data to control its bank of filters.

Let's say the load signals are OK.

The serial to parallel chip sees a transition of the clock, this signals it to get the value of the data line at that instant.   Normally some bits are high some low.  In your case they are all high or all low.  That's why everything is energized.  My guess is that either your exciter or your cable is not getting serial data to Alex.   If you have a scope trigger on the clk line and watch for data on the data line.

PowerSDR sends commands to the FPGA.  The  FPGA generates the SPI serial clock and data.  Might just need to reload the firmware.

My $0.02.

John
K2ox
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