[hpsdr] DFC

[n3evl]

Sounds interesting.  I recall some early discussions relating to DFC 
that I think initially had the objective of minimizing the involvement 
of the FPGA but this sounds even better!  I must admit I am way behind 
listening to my TeamSpeak recordings.  Looking forward to see what Phil 
has to say.

Pete, N3EVL

On 5/12/2016 9:27 AM, Scott Traurig wrote:
> I believe Phil's efforts on DFC are wholly focused on his new circuit 
> card design that I think he intends to present at Friedrichshafen this 
> June, based on Teamspeak discussions. This card will take raw ADC 
> output and put it directly onto a PCIE bus for processing in an NVIDIA 
> GPU (CUDA processing) also resident on the same PCIE bus. The great 
> advantage of this, of course, is that such an architecture would 
> eliminate the requirement for complex and expensive FPGA processing, 
> and thereby also open up development of what used to be FPGA firmware 
> to C developers.
>
> 73,
>
> Scott/w-u-2-o
>
>
> On Thu, May 12, 2016 at 8:55 AM, n3evl <n3evl at townisp.com 
> <mailto:n3evl at townisp.com>> wrote:
>
>     ***** High Performance Software Defined Radio Discussion List *****
>
>
>     I'm also curious about DFC, specifically, what will the minimum
>     /radio /hardware requirements be?  I currently have an Atlas based
>     system but seem to recall that, at least for the moment, this
>     hardware will not support the new protocol and I think the new
>     protocol is essential for DFC.  Should I be thinking of investing
>     in a Hermes (or Hemes derivative) based radio in order to take
>     advantage of DFC?
>
>     Pete, N3EVL
>
>
>
>
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