[hpsdr] Hermes/Angelia and Ethernet problems

[Jeremy McDermond]

> On Sep 28, 2016, at 3:52 PM, Mike Tubby <mike at tubby.org> wrote:
> 
> I also note that the DHCP request send by Angelia (when it is sent) is devoid of options ... it appears to be a "local lan" only implementation since it doesn't ask for netmask and default gateway... this suggests that the Ethernet and IP stack in Angelia is "minimal" and assumes that it is only going to run on a point-to-point on the same network segment?  If so then tis is a shame... I have two LANs 192.168.144.0/24 at my end of the house and 192.168.145.0/24 at the other end of the house.  My firewall/server box deals with this.
> 
> To use my Angelia fully it needs to recognise if an IP address is "outside" the netmask and send it to the default gateway instead ... this shouldn't be terribly hard to implement with 32-bit work comparisons in modern FPGAs ... just not sure anyone's bothered?

The Metis code never has had any sort of arp or routing table of any kind in it.  It merely pays attention to who is talking to it during discovery and remembers their IP and MAC address not even really paying attention to netmasks either.  It’s a very dumb IP implementation and doesn’t do much other than trying to talk to a single host.  This may have changed with the “new protocol.”  I haven’t followed very closely.  I was contemplating fixing this a long time ago, but decided to go a different direction that interested me more involving the Altera Cyclone V SoC instead.

> Mike G8TIC

>> Now, when the radio is in a normal operational mode, the MAC address is that associated with the manufacturer of the PHY chip used on the Hermes/Angelia/Orion board, and it is, of course, unique for every radio. It is a completely legal MAC address in every respect.

Actually the PHY doesn’t have an ethernet address.  That’s associated with the ethernet MAC (hence, MAC address), which is implemented on the FPGA.  There’s a special EEPROM that was added to Metis-based systems that has a pre-programmed MAC address on it that the FPGA reads and uses.  It’s U12 on Metis and it’s a Microchip 25AA02E48 (http://www.microchip.com/wwwproducts/en/en538613).

>> Scott/w-u-2-o

--
Jeremy McDermond
nh6z at nh6z.net