[hpsdr] "FPGA Floor Planning"

[George Byrkit]

Scott,
The real problem is that the paid version of Quartus includes some
purchased/licensed IP that you may have to go out of your way to NOT use,
because this IP is NOT available in the free version, so then the Verilog
code would NOT build in the free version.  It is possible that Apache could
own a paid version and check timing closures for the group, without
introducing the IP cross-contamination issue.

73,
George K9TRV

-----Original Message-----
From: Hpsdr [mailto:hpsdr-bounces at lists.openhpsdr.org] On Behalf Of Scott
Traurig
Sent: Sunday, February 12, 2017 9:49 AM
To: Helmut <dc6ny at gmx.de>
Cc: Barry Jablonski <bjablonski at att.net>; hpsdr <hpsdr at lists.openhpsdr.org>
Subject: Re: [hpsdr] "FPGA Floor Planning"

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