[hpsdr] Xilinx Zynq Ultrascale+ Includes RFSoC

[Laurence Barker]

Hi John

 

OK, that must have been the cheap one :)

 

They would be interesting though!

 

There is a lot of processing in any of the Ultrascale+ Zynqs. But getting an embedded board with desktop Ubuntu is a problem – they just don’t seem to be pitched into markets that need that. 

 

 

 

Laurence Barker

 

laurence at nicklebyhouse.co.uk

 

From: John Melton [mailto:john.d.melton at googlemail.com] 
Sent: 03 July 2020 09:39
To: Laurence Barker <laurence at nicklebyhouse.co.uk>
Cc: John C. Westmoreland, P.E. <john at westmorelandengineering.com>; HPSDR <hpsdr at openhpsdr.org>
Subject: Re: [hpsdr] Xilinx Zynq Ultrascale+ Includes RFSoC

 

Hi Laurence,

 

After your presentation I had a look at these and the evaluation boards start at about £9000.

 

— John

 

On Fri, 3 Jul 2020, 09:34 Laurence Barker, <laurence at nicklebyhouse.co.uk <mailto:laurence at nicklebyhouse.co.uk> > wrote:

***** High Performance Software Defined Radio Discussion List *****

Hi John

They don't fall over themselves to say how much those RFSoC devices cost. As
far as I know, it's quite a lot. My experiment published at SDRA2020 has a
ZU3EG ultrascale+ Zynq, and that's on a board that sells for $250 (and some
say as a loss leader). and the smallest RFSoC is 4 times bigger in gate
count, and very possibly 4 times the die area so much more expensive. They
seem to be pitched as high-end devices.

The clock rate is about 32x the 122.88MHz we use for HF SDR. Increased
averaging would have added about 2.5 bits resolution (you gain one bit per
4x sample rate change) so the 12 bit ADC devices would be up to around 14.5
bits equivalent performance. I've no idea what the noise levels are like.

So I have been very interested in these devices, but not managed to get my
fingers on one yet!





Laurence Barker G8NJJ

laurence at nicklebyhouse.co.uk <mailto:laurence at nicklebyhouse.co.uk> 

-----Original Message-----
From: Hpsdr [mailto:hpsdr-bounces at lists.openhpsdr.org <mailto:hpsdr-bounces at lists.openhpsdr.org> ] On Behalf Of John C.
Westmoreland, P.E.
Sent: 03 July 2020 07:02
To: HPSDR <hpsdr at openhpsdr.org <mailto:hpsdr at openhpsdr.org> >
Subject: [hpsdr] Xilinx Zynq Ultrascale+ Includes RFSoC

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