[hpsdr] Phoenix

[ad0es]

Hi all,

I am in the final stages of prototyping a receive only version of 
Minerva. The PCIe/FPGA/ADC parts
are working. The final step is the design of an RF appropriate front 
end. I'm afraid this is outside
of my skill set...

I would like the community's help in this design.  Any 
comments/suggestions/criticisms are welcome!
I've put together a website with info and sample schematics:

The website <https://ad0es.net/dfcADC/>

73,
Steve AD0ES

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