[hpsdr] FPGA power management

[Philip Covington]

On 4/14/06, H. Gruchow <horst at needles.de> wrote:

> As far as I understand your circuit the LD1117 is delivering the VCCIO and the FAN1112
> does the 1.2Volt VCCINT (or core voltage). This means that VCCIO will be up before the
> core voltage (just opposite to what Altera recommends).
> Don't misunderstand me. I don't want to bug you with this or keep you away from designing
> 73
> Horst
> DL6KBF

Hi Horst,

Yep, you are correct.  I was thinking upside down.

73 de Phil

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