[hpsdr] Horton LO

Robert McGwier rwmcgwier at comcast.net
Fri Jun 16 09:23:49 PDT 2006


We could in fact tell the answer by looking at a data sheet of a 
candidate.  If it has good phase noise performance at 2.4 GHz,  we will 
be okay dividing it down.  Let me make myself explicitly clear.   Your 
option 2, married with Phil C's CPLD idead  IS THE APPROACH I WOULD 
PREFER WE TAKE if the VCO can be made to behave.     You are absolutely 
correct in your clear headed thinking that we will NEVER need a DDS if 
this approach works.   The QSD, with its huge dynamic range and high IP3 
with nearly constant performance over a large range,  is the perfect 
back end for this divide by N chain.

However,  I suggest we consider one of the 500 MHz Valpey Fisher parts 
(VCOCXO) with superior phase noise and followed by  johnson counter 
doing 4 phase.  We can then feed four equal length digital dividers to 
produce the sampling phases for the QSD and tune  0-125 MHz with it in 
CPLD/FPGA divider chain limitations.  These produce the digital signals 
for switching the capactors in the QSD.    We should NEVER consider a 
DDS for driving the caps.  We only need the digital signals.  You are 
absolutely guaranteed by going from a digital approximation, to an 
approxiate sinusoid,  through an approximate comparator,  to produce the 
approximate aperture jittering digital signals that the performance is 
much worse than producing the digital signals directly.

If we take the 500 MHz high quality oscillators and do a johnson counter 
to produce four signals at 125 MHz to drive the capacitors in the QSD,  
we can then feed each of the 125 MHz signals into four equal length 
divider chains.  With 16 bit dividers,   we get 2.5 KHz resolution.  If 
we find we cannot put the 16 bit counters in a CPLD,  with a good QSD 
design, we can go up to 5, 10, 20, etc. kHz and do the last IF (which we 
were going to do anyway) in a PC based or DSP based NCO.


I suggest we use the VCOCXO from Valpey Fisher for a reason.  Hambly and 
I have experience steering this oscillator.  Hambly is about to take on 
the Gibraltar project as its lead designer and is going to contribute to 
HPSDR important pieces of intellectual property from his company.    I 
have helped him write the steering code for this oscillator and the 
level we are steering now is absolutely overkill for this project even 
though we know we can push it even further.  The GPS taming of this 
oscillator (or other reference) provides pretty much unbelievable 
frequency accuracy and stability.  I think the two Phil's and their 
comments about the approaches to be taken here are right on the money 
and we should pursue it with a vengeance.


73's
Bob
N4HY


pvharman at arach.net.au wrote:
> Chris,
>
> The DDS provides the fine frequency steps. Since we can get away with 10kHz 
> steps I don't see why a DDS is required. 
>
>
> Bob,
>
> I was looking at a canned GHz oscillator, not multiplying up.  A 2.4GHz DIP 
> VCO when divided down should give a very respectable phase performance. 
>
> The ADF4153 Fractional_N chip works up to 4GHz. 
>
> 73's Phil...VK6APH 
>
>
> Quoting "Christopher T. Day" <CTDay at lbl.gov>:
>
>   
>> I'm interested that Oleg says in his first paragraph that Drentea's
>> hybrid solution would have worked if he could have gotten the DDS chips.
>> We can get the DDS chips. Why not use Dentrea's solution?
>>
>>
>> 	Chris - AE6VK
>>
>>
>> -----Original Message-----
>> From: Robert McGwier [mailto:rwmcgwier at comcast.net] 
>> Sent: Thursday, June 15, 2006 11:25 PM
>> To: pvharman at arach.net.au
>> Cc: hpsdr at hpsdr.org
>> Subject: Re: [hpsdr] Horton LO
>>
>> ***** High Performance Software Defined Radio Discussion List *****
>>
>>
>>
>> Bob
>>
>>
>> pvharman at arach.net.au wrote:
>>     
>>> ***** High Performance Software Defined Radio Discussion List *****
>>>
>>> A few further thoughts about the local oscillator for Horton. 
>>>
>>> We seem to be considering two options:
>>>
>>> 1.	A DDS based design
>>> 2.	Dividing down a GHz oscillator
>>>
>>> Both would appear to give very good phase performance. The DDS may
>>>       
>> have spur 
>>     
>>> issues and the divider method will be more complex. 
>>>
>>> For those that have access to the latest DDS chips what short of
>>>       
>> performance 
>>     
>>> are you seeing? Are the latest devices really suitable of use on
>>>       
>> 10/6m  
>>     
>>> directly as a LO in terms of spur levels?
>>>
>>> I had a look at Oleg  UR3IQ article on Fractional-N. His reported
>>>       
>> phase noise 
>>     
>>> is quite good  (-120dBc/Hz at 2kHz) but looking at the reported
>>>       
>> performance of 
>>     
>>> the Orion (which uses UHF oscillators divided down) they are getting
>>>       
>> -130dBc 
>>     
>>> at 200Hz. I see that for some reason the Orion phase noise actually
>>>       
>> degrades 
>>     
>>> at  40-50kHz, not quite sure why that should be. 
>>>   
>>>       
>> This is almost surely a PLL design fault.
>>
>>     
>>> I also looked at the US patent (5,847,615) that Oleg mentions. More
>>>       
>> complex 
>>     
>>> than Oleg's circuit but should be capable of very good performance.
>>>
>>> Returning to  option 2.  I can't help thinking that if we use a GHz
>>>       
>> VCO and 
>>     
>>> divide this down to  1-120MHz in say 40kHz steps and then divide by 4
>>>       
>> to give 
>>     
>>> us quadrature signals at 10kHz steps then we may be able to do this
>>>       
>> without 
>>     
>>> the need to resort to Fractional-N techniques.  With 96/192k A/D
>>>       
>> sampling 
>>     
>>> doing the fine frequency resolution in the DSP code will be fine.
>>>   
>>>       
>> If we get the GHz VCO from multiplying some lower frequency oscillator 
>> up we will pay in an increased phase noise penalty and in fact, the 
>> phase noise will never be as good as the lower frequency oscillator 
>> inside. How does it work? If you have sent a candidate part or design, I
>>
>> have missed it. Can you repeat?
>>
>>
>>     
>>> Anyone with synthesizer design experience out there able to comment
>>>       
>> please?
>>     
>>> 73's Phil...VK6APH 
>>>
>>>
>>>   
>>>       
>> -- 
>> AMSAT VP Engineering. Member: ARRL, AMSAT-DL, TAPR, Packrats,
>> NJQRP/AMQRP, QRP ARCI, QCWA, FRC. ARRL SDR Wrk Grp Chairman
>> Laziness is the number one inspiration for ingenuity.  Guilty as
>> charged!
>>
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>>
>>     
>
>
>
>
>   


-- 
AMSAT VP Engineering. Member: ARRL, AMSAT-DL, TAPR, Packrats,
NJQRP/AMQRP, QRP ARCI, QCWA, FRC. ARRL SDR Wrk Grp Chairman
Laziness is the number one inspiration for ingenuity.  Guilty as charged!


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