[hpsdr] [OZY] Initial OZY Schematic Posted For Review and Comments- May 10, 2006

[Philip Covington]

On 5/10/06, Christopher T. Day <CTDay at lbl.gov> wrote:
> Phil,
>
> I yield on the SRAM for the FX2 question. As long as the I2C EEPROM is
> there, I'll get by. And with the intrinsic RAM of the FPGA, I doubt that
> anything more is needed on that side either.
>
>
>         Chris - AE6VK
>
>
> P.S. - I'm about to order an I2C EEPROM for my Xylo so I can play around
> with boot processes and things. I want to see if I can get Cypress'
> "Streaming Over USB" Reference Design going on the Xylo.
>
>
 Hi Chris,

At this point I have 32 lines from the FPGA that will go to headers. 
I hope to arrange the board layout so that a daughtercard could be
plugged into the headers and straddle the Cyclone and Cypress FX2.  It
would not be too hard to add SRAM (or whatever) this way if you ever
need a large buffer or want to run an embedded processor in the
FPGA...

73 de Phil N8VB

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