[hpsdr] [OZY] No BGA for OZY

[Bill Tracey]

Yikes this is moving fast -- can't step out to work for a bit without the 
desgin lurching forward!

BGA -- a no vote from me.

3 RS232 outputs on a 2x5 header @ RS232 levels.  Will do some thinking on 
the header layout

No SRAM -- good choice.  My concern on FIFO space was for a multiple board 
configuration and assumed we'd get no relief from doing better 
config/firmware for the FX2 FIFOs.  Eric Blossom pointing out that the USRP 
is running using only 50% of the RAM on it used sort of says we should be 
able to get this to work with only the RAM bits on the FPGA.

No buffered input output -- can live with it.  An expansion board off the 
2x10 or a board on the bus will do.

Regards,

Bill  (kd5tfd)



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